Merged main:503bc5f66111 into amd-gfx:2a4e1350d643

Local branch amd-gfx 2a4e135 Merged main:7e856d18943f into amd-gfx:696586eb9f42
Remote branch main 503bc5f [LLD] [COFF] Fix handling of comdat .drectve sections (llvm#68116)

Author: SC llvm team

lld/COFF/InputFiles.cpp

@@ -661,6 +661,8 @@ std::optional<Symbol *> ObjFile::createDefined(
     if (prevailing) {
       SectionChunk *c = readSection(sectionNumber, def, getName());
       sparseChunks[sectionNumber] = c;
+      if (!c)
+        return nullptr;
       c->sym = cast<DefinedRegular>(leader);
       c->selection = selection;
       cast<DefinedRegular>(leader)->data = &c->repl;

lld/test/COFF/comdat-drectve.s

@@ -0,0 +1,31 @@
+# REQUIRES: x86
+
+# RUN: llvm-mc -triple=x86_64-windows-gnu %s -filetype=obj -o %t.obj
+
+# RUN: lld-link %t.obj -out:%t.exe -debug:symtab -subsystem:console
+# RUN: llvm-readobj --coff-exports %t.exe | FileCheck %s
+
+# CHECK: Name: exportedFunc
+
+## This assembly snippet has been reduced from what Clang generates from
+## this C snippet, with -fsanitize=address. Normally, the .drectve
+## section would be a regular section - but when compiled with
+## -fsanitize=address, it becomes a comdat section.
+##
+# void exportedFunc(void) {}
+# void mainCRTStartup(void) {}
+# static __attribute__((section(".drectve"), used)) const char export_chkstk[] =
+#     "-export:exportedFunc";
+
+	.text
+	.globl	exportedFunc
+exportedFunc:
+	retq
+
+	.globl	mainCRTStartup
+mainCRTStartup:
+	retq
+
+	.section	.drectve,"dr",one_only,export_chkstk
+export_chkstk:
+	.asciz	"-export:exportedFunc"

llvm/include/llvm/Config/llvm-config.h.cmake

@@ -16,7 +16,7 @@
 
 /* Indicate that this is LLVM compiled from the amd-gfx branch. */
 #define LLVM_HAVE_BRANCH_AMD_GFX
-#define LLVM_MAIN_REVISION 476726
+#define LLVM_MAIN_REVISION 476733
 
 /* Define if LLVM_ENABLE_DUMP is enabled */
 #cmakedefine LLVM_ENABLE_DUMP

llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

@@ -2251,7 +2251,7 @@ bool AArch64InstructionSelector::earlySelect(MachineInstr &I) {
     // Before selecting a DUP instruction, check if it is better selected as a
     // MOV or load from a constant pool.
     Register Src = I.getOperand(1).getReg();
-    auto ValAndVReg = getIConstantVRegValWithLookThrough(Src, MRI);
+    auto ValAndVReg = getAnyConstantVRegValWithLookThrough(Src, MRI);
     if (!ValAndVReg)
       return false;
     LLVMContext &Ctx = MF.getFunction().getContext();
@@ -5600,8 +5600,7 @@ MachineInstr *AArch64InstructionSelector::tryAdvSIMDModImmFP(
   if (DstSize == 128) {
     if (Bits.getHiBits(64) != Bits.getLoBits(64))
       return nullptr;
-    // Need to deal with 4f32
-    Op = AArch64::FMOVv2f64_ns;
+    Op = AArch64::FMOVv4f32_ns;
     IsWide = true;
   } else {
     Op = AArch64::FMOVv2f32_ns;
@@ -5610,9 +5609,10 @@ MachineInstr *AArch64InstructionSelector::tryAdvSIMDModImmFP(
   uint64_t Val = Bits.zextOrTrunc(64).getZExtValue();
 
   if (AArch64_AM::isAdvSIMDModImmType11(Val)) {
-    Val = AArch64_AM::encodeAdvSIMDModImmType7(Val);
+    Val = AArch64_AM::encodeAdvSIMDModImmType11(Val);
   } else if (IsWide && AArch64_AM::isAdvSIMDModImmType12(Val)) {
     Val = AArch64_AM::encodeAdvSIMDModImmType12(Val);
+    Op = AArch64::FMOVv2f64_ns;
   } else
     return nullptr;
 

llvm/test/CodeGen/AArch64/GlobalISel/select-to-fmin-fmax.ll

@@ -39,8 +39,7 @@ entry:
 define <4 x half> @test_v4s16(<4 x half> %a) #0 {
 ; CHECK-LABEL: test_v4s16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.4h, v1.h[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.4h, v1.4h, v0.4h
 ; CHECK-NEXT:    ret
 entry:
@@ -52,8 +51,7 @@ entry:
 define <8 x half> @test_v8s16(<8 x half> %a) #0 {
 ; CHECK-LABEL: test_v8s16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.8h, v1.h[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.8h, v1.8h, v0.8h
 ; CHECK-NEXT:    ret
 entry:
@@ -65,8 +63,7 @@ entry:
 define <2 x float> @test_v2s32(<2 x float> %a) #0 {
 ; CHECK-LABEL: test_v2s32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.2s, v1.s[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.2s, v1.2s, v0.2s
 ; CHECK-NEXT:    ret
 entry:
@@ -78,8 +75,7 @@ entry:
 define <4 x float> @test_v4s32(<4 x float> %a) #0 {
 ; CHECK-LABEL: test_v4s32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.4s, v1.s[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.4s, v1.4s, v0.4s
 ; CHECK-NEXT:    ret
 entry:
@@ -91,8 +87,7 @@ entry:
 define <2 x double> @test_v2s64(<2 x double> %a) #0 {
 ; CHECK-LABEL: test_v2s64:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.2d, v1.d[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.2d, v1.2d, v0.2d
 ; CHECK-NEXT:    ret
 entry:

llvm/test/CodeGen/AArch64/neon-mov.ll

@@ -305,44 +305,26 @@ define <1 x i64> @movid() {
 }
 
 define <2 x float> @fmov2s() {
-; CHECK-SD-LABEL: fmov2s:
-; CHECK-SD:       // %bb.0:
-; CHECK-SD-NEXT:    fmov v0.2s, #-12.00000000
-; CHECK-SD-NEXT:    ret
-;
-; CHECK-GI-LABEL: fmov2s:
-; CHECK-GI:       // %bb.0:
-; CHECK-GI-NEXT:    fmov s0, #-12.00000000
-; CHECK-GI-NEXT:    dup v0.2s, v0.s[0]
-; CHECK-GI-NEXT:    ret
+; CHECK-LABEL: fmov2s:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fmov v0.2s, #-12.00000000
+; CHECK-NEXT:    ret
 	ret <2 x float> < float -1.2e1, float -1.2e1>
 }
 
 define <4 x float> @fmov4s() {
-; CHECK-SD-LABEL: fmov4s:
-; CHECK-SD:       // %bb.0:
-; CHECK-SD-NEXT:    fmov v0.4s, #-12.00000000
-; CHECK-SD-NEXT:    ret
-;
-; CHECK-GI-LABEL: fmov4s:
-; CHECK-GI:       // %bb.0:
-; CHECK-GI-NEXT:    fmov s0, #-12.00000000
-; CHECK-GI-NEXT:    dup v0.4s, v0.s[0]
-; CHECK-GI-NEXT:    ret
+; CHECK-LABEL: fmov4s:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fmov v0.4s, #-12.00000000
+; CHECK-NEXT:    ret
 	ret <4 x float> < float -1.2e1, float -1.2e1, float -1.2e1, float -1.2e1>
 }
 
 define <2 x double> @fmov2d() {
-; CHECK-SD-LABEL: fmov2d:
-; CHECK-SD:       // %bb.0:
-; CHECK-SD-NEXT:    fmov v0.2d, #-12.00000000
-; CHECK-SD-NEXT:    ret
-;
-; CHECK-GI-LABEL: fmov2d:
-; CHECK-GI:       // %bb.0:
-; CHECK-GI-NEXT:    fmov d0, #-12.00000000
-; CHECK-GI-NEXT:    dup v0.2d, v0.d[0]
-; CHECK-GI-NEXT:    ret
+; CHECK-LABEL: fmov2d:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fmov v0.2d, #-12.00000000
+; CHECK-NEXT:    ret
 	ret <2 x double> < double -1.2e1, double -1.2e1>
 }
 

llvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp

@@ -37,7 +37,6 @@
 using namespace llvm;
 using namespace dwarf;
 using namespace utils;
-using ::testing::HasSubstr;
 
 namespace {
 

llvm/unittests/DebugInfo/DWARF/DWARFDieTest.cpp

@@ -15,7 +15,6 @@
 
 using namespace llvm;
 using namespace llvm::dwarf;
-using object::SectionedAddress;
 
 namespace {
 

llvm/unittests/DebugInfo/DWARF/DWARFLocationExpressionTest.cpp

@@ -11,7 +11,6 @@
 #include "gtest/gtest.h"
 
 using namespace llvm;
-using object::SectionedAddress;
 
 TEST(DWARFLocationExpression, Equality) {
   EXPECT_EQ((DWARFLocationExpression{std::nullopt, {}}),

llvm/unittests/FuzzMutate/OperationsTest.cpp

@@ -48,7 +48,6 @@ using testing::Each;
 using testing::ElementsAre;
 using testing::Eq;
 using testing::Ge;
-using testing::NotNull;
 using testing::PrintToString;
 using testing::SizeIs;
 using testing::Truly;

llvm/unittests/Support/YAMLIOTest.cpp

@@ -23,7 +23,6 @@ using llvm::yaml::Hex32;
 using llvm::yaml::Hex64;
 using llvm::yaml::Hex8;
 using llvm::yaml::Input;
-using llvm::yaml::IO;
 using llvm::yaml::isNumeric;
 using llvm::yaml::MappingNormalization;
 using llvm::yaml::MappingTraits;

llvm/unittests/Transforms/Scalar/LoopPassManagerTest.cpp

@@ -33,7 +33,6 @@ namespace {
 
 using testing::DoDefault;
 using testing::Return;
-using testing::Expectation;
 using testing::Invoke;
 using testing::InvokeWithoutArgs;
 using testing::_;

llvm/unittests/XRay/FDRBlockVerifierTest.cpp

@@ -17,8 +17,6 @@ namespace llvm {
 namespace xray {
 namespace {
 
-using ::testing::ElementsAre;
-using ::testing::Not;
 using ::testing::SizeIs;
 
 TEST(FDRBlockVerifierTest, ValidBlocksV3) {

llvm/unittests/tools/llvm-cfi-verify/GraphBuilder.cpp

@@ -49,10 +49,8 @@ using ::testing::IsEmpty;
 using ::testing::Matches;
 using ::testing::Pair;
 using ::testing::PrintToString;
-using ::testing::Property;
 using ::testing::SizeIs;
 using ::testing::UnorderedElementsAre;
-using ::testing::Value;
 
 namespace llvm {
 namespace cfi_verify {

mlir/include/mlir/IR/Value.h

@@ -268,6 +268,9 @@ class OpOperand : public IROperand<OpOperand, Value> {
   /// Return which operand this is in the OpOperand list of the Operation.
   unsigned getOperandNumber();
 
+  /// Set the current value being used by this operand.
+  void assign(Value value) { set(value); }
+
 private:
   /// Keep the constructor private and accessible to the OperandStorage class
   /// only to avoid hard-to-debug typo/programming mistakes.

mlir/include/mlir/IR/ValueRange.h

@@ -126,6 +126,9 @@ class MutableOperandRange {
                       ArrayRef<OperandSegment> operandSegments = std::nullopt);
   MutableOperandRange(Operation *owner);
 
+  /// Construct a new mutable range for the given OpOperand.
+  MutableOperandRange(OpOperand &opOperand);
+
   /// Slice this range into a sub range, with the additional operand segment.
   MutableOperandRange
   slice(unsigned subStart, unsigned subLen,

mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp

@@ -537,18 +537,18 @@ LogicalResult DeallocTensorOp::bufferize(RewriterBase &rewriter,
 
 bool MaterializeInDestinationOp::bufferizesToMemoryRead(
     OpOperand &opOperand, const AnalysisState &state) {
-  return &opOperand == &getSourceMutable()[0];
+  return &opOperand == &getSourceMutable();
 }
 
 bool MaterializeInDestinationOp::bufferizesToMemoryWrite(
     OpOperand &opOperand, const AnalysisState &state) {
-  return &opOperand == &getDestMutable()[0];
+  return &opOperand == &getDestMutable();
 }
 
 AliasingValueList
 MaterializeInDestinationOp::getAliasingValues(OpOperand &opOperand,
                                               const AnalysisState &state) {
-  if (&opOperand == &getDestMutable()[0])
+  if (&opOperand == &getDestMutable())
     return {{getOperation()->getResult(0), BufferRelation::Equivalent}};
   return {};
 }

mlir/lib/Dialect/Linalg/Transforms/ElementwiseOpFusion.cpp

@@ -949,7 +949,7 @@ struct FoldReshapeWithGenericOpByExpansion
           reshapeOp, "failed preconditions of fusion with producer generic op");
     }
 
-    if (!controlFoldingReshapes(&reshapeOp.getSrcMutable()[0])) {
+    if (!controlFoldingReshapes(&reshapeOp.getSrcMutable())) {
       return rewriter.notifyMatchFailure(reshapeOp,
                                          "fusion blocked by control function");
     }

mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp

@@ -526,7 +526,7 @@ mlir::scf::tileAndFuseProducerOfSlice(RewriterBase &rewriter,
   // 1. Get the producer of the source (potentially walking through
   // `iter_args` of nested `scf.for`)
   auto [fusableProducer, destinationInitArg] =
-      getUntiledProducerFromSliceSource(&candidateSliceOp.getSourceMutable()[0],
+      getUntiledProducerFromSliceSource(&candidateSliceOp.getSourceMutable(),
                                         loops);
   if (!fusableProducer)
     return std::nullopt;

mlir/lib/Dialect/Tensor/Transforms/BufferizableOpInterfaceImpl.cpp

@@ -636,11 +636,11 @@ struct InsertSliceOpInterface
     RankedTensorType destType = insertSliceOp.getDestType();
 
     // The source is always read.
-    if (&opOperand == &insertSliceOp.getSourceMutable()[0])
+    if (&opOperand == &insertSliceOp.getSourceMutable())
       return true;
 
     // For the destination, it depends...
-    assert(&opOperand == &insertSliceOp.getDestMutable()[0] && "expected dest");
+    assert(&opOperand == &insertSliceOp.getDestMutable() && "expected dest");
 
     // Dest is not read if it is entirely overwritten. E.g.:
     // tensor.insert_slice %a into %t[0][10][1] : ... into tensor<10xf32>
@@ -840,7 +840,7 @@ struct ReshapeOpInterface
   bool bufferizesToMemoryRead(Operation *op, OpOperand &opOperand,
                               const AnalysisState &state) const {
     auto reshapeOp = cast<tensor::ReshapeOp>(op);
-    return &opOperand == &reshapeOp.getShapeMutable()[0];
+    return &opOperand == &reshapeOp.getShapeMutable();
   }
 
   bool bufferizesToMemoryWrite(Operation *op, OpOperand &opOperand,
@@ -917,7 +917,7 @@ struct ParallelInsertSliceOpInterface
   bool bufferizesToMemoryWrite(Operation *op, OpOperand &opOperand,
                                const AnalysisState &state) const {
     auto parallelInsertSliceOp = cast<ParallelInsertSliceOp>(op);
-    return &opOperand == &parallelInsertSliceOp.getDestMutable()[0];
+    return &opOperand == &parallelInsertSliceOp.getDestMutable();
   }
 
   LogicalResult bufferize(Operation *op, RewriterBase &rewriter,

mlir/lib/Dialect/Tensor/Transforms/SubsetInsertionOpInterfaceImpl.cpp

@@ -63,7 +63,7 @@ struct InsertSliceOpInterface
     : public SubsetInsertionOpInterface::ExternalModel<InsertSliceOpInterface,
                                                        tensor::InsertSliceOp> {
   OpOperand &getSourceOperand(Operation *op) const {
-    return op->getOpOperand(0);
+    return cast<tensor::InsertSliceOp>(op).getSourceMutable();
   }
 
   bool
@@ -91,11 +91,11 @@ struct ParallelInsertSliceOpInterface
     : public SubsetInsertionOpInterface::ExternalModel<
           ParallelInsertSliceOpInterface, tensor::ParallelInsertSliceOp> {
   OpOperand &getSourceOperand(Operation *op) const {
-    return op->getOpOperand(0);
+    return cast<tensor::ParallelInsertSliceOp>(op).getSourceMutable();
   }
 
   OpOperand &getDestinationOperand(Operation *op) const {
-    return op->getOpOperand(1);
+    return cast<tensor::ParallelInsertSliceOp>(op).getDestMutable();
   }
 
   bool