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arsenmarsenm
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AMDGPU: Fix mishandling of search for constantexpr addrspacecasts (llvm#120346)
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2 files changed

+84
-15
lines changed

2 files changed

+84
-15
lines changed

‎llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp

Lines changed: 22 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -154,7 +154,14 @@ class AMDGPUInformationCache : public InformationCache {
154154

155155
TargetMachine &TM;
156156

157-
enum ConstantStatus { DS_GLOBAL = 1 << 0, ADDR_SPACE_CAST = 1 << 1 };
157+
enum ConstantStatus : uint8_t {
158+
NONE = 0,
159+
DS_GLOBAL = 1 << 0,
160+
ADDR_SPACE_CAST_PRIVATE_TO_FLAT = 1 << 1,
161+
ADDR_SPACE_CAST_LOCAL_TO_FLAT = 1 << 2,
162+
ADDR_SPACE_CAST_BOTH_TO_FLAT =
163+
ADDR_SPACE_CAST_PRIVATE_TO_FLAT | ADDR_SPACE_CAST_LOCAL_TO_FLAT
164+
};
158165

159166
/// Check if the subtarget has aperture regs.
160167
bool hasApertureRegs(Function &F) {
@@ -233,13 +240,20 @@ class AMDGPUInformationCache : public InformationCache {
233240
}
234241

235242
private:
236-
/// Check if the ConstantExpr \p CE requires the queue pointer.
237-
static bool visitConstExpr(const ConstantExpr *CE) {
243+
/// Check if the ConstantExpr \p CE uses an addrspacecast from private or
244+
/// local to flat. These casts may require the queue pointer.
245+
static uint8_t visitConstExpr(const ConstantExpr *CE) {
246+
uint8_t Status = NONE;
247+
238248
if (CE->getOpcode() == Instruction::AddrSpaceCast) {
239249
unsigned SrcAS = CE->getOperand(0)->getType()->getPointerAddressSpace();
240-
return castRequiresQueuePtr(SrcAS);
250+
if (SrcAS == AMDGPUAS::PRIVATE_ADDRESS)
251+
Status |= ADDR_SPACE_CAST_PRIVATE_TO_FLAT;
252+
else if (SrcAS == AMDGPUAS::LOCAL_ADDRESS)
253+
Status |= ADDR_SPACE_CAST_LOCAL_TO_FLAT;
241254
}
242-
return false;
255+
256+
return Status;
243257
}
244258

245259
/// Get the constant access bitmap for \p C.
@@ -254,8 +268,7 @@ class AMDGPUInformationCache : public InformationCache {
254268
Result = DS_GLOBAL;
255269

256270
if (const auto *CE = dyn_cast<ConstantExpr>(C))
257-
if (visitConstExpr(CE))
258-
Result |= ADDR_SPACE_CAST;
271+
Result |= visitConstExpr(CE);
259272

260273
for (const Use &U : C->operands()) {
261274
const auto *OpC = dyn_cast<Constant>(U);
@@ -284,19 +297,13 @@ class AMDGPUInformationCache : public InformationCache {
284297
if (IsNonEntryFunc && (Access & DS_GLOBAL))
285298
return true;
286299

287-
return !HasAperture && (Access & ADDR_SPACE_CAST);
300+
return !HasAperture && (Access & ADDR_SPACE_CAST_BOTH_TO_FLAT);
288301
}
289302

290303
bool checkConstForAddrSpaceCastFromPrivate(const Constant *C) {
291304
SmallPtrSet<const Constant *, 8> Visited;
292305
uint8_t Access = getConstantAccess(C, Visited);
293-
294-
if (Access & ADDR_SPACE_CAST)
295-
if (const auto *CE = dyn_cast<ConstantExpr>(C))
296-
if (CE->getOperand(0)->getType()->getPointerAddressSpace() ==
297-
AMDGPUAS::PRIVATE_ADDRESS)
298-
return true;
299-
return false;
306+
return Access & ADDR_SPACE_CAST_PRIVATE_TO_FLAT;
300307
}
301308

302309
private:

‎llvm/test/CodeGen/AMDGPU/issue120256-annotate-constexpr-addrspacecast.ll

Lines changed: 62 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,62 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5
2+
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 -passes=amdgpu-attributor %s | FileCheck %s
3+
4+
@buf_shared = internal addrspace(3) global [2080 x i8] poison, align 16
5+
6+
; Constant expression element may not have a pointer type and the
7+
; addrspacecast may not be the toplevel operation.
8+
9+
10+
; This should infer "amdgpu-no-flat-scratch-init". It should not infer "amdgpu-no-queue-ptr"
11+
;.
12+
; CHECK: @buf_shared = internal addrspace(3) global [2080 x i8] poison, align 16
13+
; CHECK: @buf_private = internal addrspace(5) global [2080 x i8] poison, align 16
14+
;.
15+
define amdgpu_kernel void @issue120256(ptr addrspace(1) %out) {
16+
; CHECK-LABEL: define amdgpu_kernel void @issue120256(
17+
; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0:[0-9]+]] {
18+
; CHECK-NEXT: [[CONV_I:%.*]] = and i32 trunc (i64 sub (i64 16, i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @buf_shared to ptr) to i64)) to i32), 15
19+
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(3) @buf_shared, i32 [[CONV_I]]
20+
; CHECK-NEXT: [[LD:%.*]] = load i8, ptr addrspace(3) [[ADD_PTR]], align 1
21+
; CHECK-NEXT: store i8 [[LD]], ptr addrspace(1) [[OUT]], align 1
22+
; CHECK-NEXT: ret void
23+
;
24+
%conv.i = and i32 trunc (i64 sub (i64 16, i64 ptrtoint (ptr addrspacecast (ptr addrspace(3) @buf_shared to ptr) to i64)) to i32), 15
25+
%add.ptr = getelementptr inbounds nuw i8, ptr addrspace(3) @buf_shared, i32 %conv.i
26+
%ld = load i8, ptr addrspace(3) %add.ptr, align 1
27+
store i8 %ld, ptr addrspace(1) %out, align 1
28+
ret void
29+
}
30+
31+
@buf_private = internal addrspace(5) global [2080 x i8] poison, align 16
32+
33+
; Constant expression element may not have a pointer type and the
34+
; addrspacecast may not be the toplevel operation.
35+
36+
; This should not infer "amdgpu-no-flat-scratch-init" nor "amdgpu-no-queue-ptr"
37+
define amdgpu_kernel void @issue120256_private(ptr addrspace(1) %out) {
38+
; CHECK-LABEL: define amdgpu_kernel void @issue120256_private(
39+
; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR1:[0-9]+]] {
40+
; CHECK-NEXT: [[CONV_I:%.*]] = and i32 trunc (i64 sub (i64 16, i64 ptrtoint (ptr addrspacecast (ptr addrspace(5) @buf_private to ptr) to i64)) to i32), 15
41+
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds nuw i8, ptr addrspace(5) @buf_private, i32 [[CONV_I]]
42+
; CHECK-NEXT: [[LD:%.*]] = load i8, ptr addrspace(5) [[ADD_PTR]], align 1
43+
; CHECK-NEXT: store i8 [[LD]], ptr addrspace(1) [[OUT]], align 1
44+
; CHECK-NEXT: ret void
45+
;
46+
%conv.i = and i32 trunc (i64 sub (i64 16, i64 ptrtoint (ptr addrspacecast (ptr addrspace(5) @buf_private to ptr) to i64)) to i32), 15
47+
%add.ptr = getelementptr inbounds nuw i8, ptr addrspace(5) @buf_private, i32 %conv.i
48+
%ld = load i8, ptr addrspace(5) %add.ptr, align 1
49+
store i8 %ld, ptr addrspace(1) %out, align 1
50+
ret void
51+
}
52+
53+
!llvm.module.flags = !{!0}
54+
55+
; FIXME: Inference of amdgpu-no-queue-ptr should not depend on code object version.
56+
!0 = !{i32 1, !"amdhsa_code_object_version", i32 400}
57+
;.
58+
; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx803" "uniform-work-group-size"="false" }
59+
; CHECK: attributes #[[ATTR1]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx803" "uniform-work-group-size"="false" }
60+
;.
61+
; CHECK: [[META0:![0-9]+]] = !{i32 1, !"amdhsa_code_object_version", i32 400}
62+
;.

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