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[RISCV][GlobalISel] Select G_FRAME_INDEX (llvm#68254)
This patch is a bandage to get G_FRAME_INDEX working. We could import the SelectionDAG patterns for the ComplexPattern FrameAddrRegImm, and perhaps we will do that in the future. For now we just select it as an addition with 0.
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llvm/lib/Target/RISCV/GISel/RISCVInstructionSelector.cpp

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@@ -194,6 +194,14 @@ bool RISCVInstructionSelector::select(MachineInstr &MI) {
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}
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case TargetOpcode::G_SEXT_INREG:
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return selectSExtInreg(MI, MIB);
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case TargetOpcode::G_FRAME_INDEX: {
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// TODO: We may want to replace this code with the SelectionDAG patterns,
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// which fail to get imported because it uses FrameAddrRegImm, which is a
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// ComplexPattern
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MI.setDesc(TII.get(RISCV::ADDI));
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MI.addOperand(MachineOperand::CreateImm(0));
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return constrainSelectedInstRegOperands(MI, TII, TRI, RBI);
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}
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case TargetOpcode::G_SELECT:
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return selectSelect(MI, MIB, MRI);
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default:

llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp

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@@ -135,6 +135,7 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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case TargetOpcode::G_STORE:
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break;
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case TargetOpcode::G_CONSTANT:
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case TargetOpcode::G_FRAME_INDEX:
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case TargetOpcode::G_GLOBAL_VALUE:
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case TargetOpcode::G_BRCOND:
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OperandsMapping = getOperandsMapping({GPRValueMapping, nullptr});
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@@ -0,0 +1,32 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv32 -run-pass=instruction-select %s -o - \
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# RUN: | FileCheck %s
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--- |
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define ptr @frame_index() {
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entry:
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%x = alloca i32, align 4
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ret ptr %x
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}
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...
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---
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name: frame_index
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gprb, preferred-register: '' }
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stack:
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- { id: 0, name: x, type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.1.entry:
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; CHECK-LABEL: name: frame_index
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; CHECK: [[ADDI:%[0-9]+]]:gpr = ADDI %stack.0.x, 0
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; CHECK-NEXT: $x10 = COPY [[ADDI]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = G_FRAME_INDEX %stack.0.x
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$x10 = COPY %0(p0)
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PseudoRET implicit $x10
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...
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv64 -run-pass=instruction-select %s -o - \
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# RUN: | FileCheck %s
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--- |
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define ptr @frame_index() {
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entry:
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%x = alloca i32, align 4
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ret ptr %x
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}
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...
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---
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name: frame_index
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legalized: true
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regBankSelected: true
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registers:
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- { id: 0, class: gprb, preferred-register: '' }
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stack:
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- { id: 0, name: x, type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.1.entry:
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; CHECK-LABEL: name: frame_index
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; CHECK: [[ADDI:%[0-9]+]]:gpr = ADDI %stack.0.x, 0
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; CHECK-NEXT: $x10 = COPY [[ADDI]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = G_FRAME_INDEX %stack.0.x
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$x10 = COPY %0(p0)
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PseudoRET implicit $x10
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...
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv32 -run-pass=regbankselect %s -o - \
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# RUN: | FileCheck %s
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# RUN: llc -mtriple=riscv64 -run-pass=regbankselect %s -o - \
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# RUN: | FileCheck %s
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--- |
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define ptr @frame_index() {
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entry:
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%x = alloca i32, align 4
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ret ptr %x
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}
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...
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---
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name: frame_index
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legalized: true
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registers:
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- { id: 0, class: _, preferred-register: '' }
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stack:
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- { id: 0, name: x, type: default, offset: 0, size: 4, alignment: 4,
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stack-id: default, callee-saved-register: '', callee-saved-restored: true,
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debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
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body: |
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bb.1.entry:
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; CHECK-LABEL: name: frame_index
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; CHECK: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %stack.0.x
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; CHECK-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:_(p0) = G_FRAME_INDEX %stack.0.x
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$x10 = COPY %0(p0)
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PseudoRET implicit $x10
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...

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