[AMDGPU] - Fix non-deterministic compile issue (llvm#126271)

4ce1f9079d4d3 [AMDGPU] Allow rematerialization of instructions with
virtual register uses (llvm#124327)
made changes that require an ordered traversal of a DenseMap. Changing
it to MapVector which
respects insertion order.

Author: dstutt

llvm/lib/Target/AMDGPU/GCNSchedStrategy.h

@@ -442,7 +442,7 @@ class PreRARematStage : public GCNSchedStage {
 
   // Map a trivially rematerializable def to a list of regions at MinOccupancy
   // that has the defined reg as a live-in.
-  DenseMap<MachineInstr *, SmallVector<unsigned, 4>> RematDefToLiveInRegions;
+  MapVector<MachineInstr *, SmallVector<unsigned, 4>> RematDefToLiveInRegions;
 
   // Collect all trivially rematerializable VGPR instructions with a single def
   // and single use outside the defining block into RematerializableInsts.