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[XRay] Change ARM/AArch64/powerpc64le to use version 2 sled (PC-relative address)
Follow-up of D78082 (x86-64). This change avoids dynamic relocations in `xray_instr_map` for ARM/AArch64/powerpc64le. MIPS64 cannot use 64-bit PC-relative addresses because R_MIPS_PC64 is not defined. Because MIPS32 shares the same code, for simplicity, we don't use PC-relative addresses for MIPS32 as well. Tested on AArch64 Linux and ppc64le Linux. Reviewed By: ianlevesque Differential Revision: https://reviews.llvm.org/D78590 upstream-commit: 25e2261
1 parent ec90827 commit 67a7bee

12 files changed

+37
-33
lines changed

‎compiler-rt/lib/xray/xray_AArch64.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,7 @@ inline static bool patchSled(const bool Enable, const uint32_t FuncId,
6161
// When |Enable|==false, we set back the first instruction in the sled to be
6262
// B #32
6363

64-
uint32_t *FirstAddress = reinterpret_cast<uint32_t *>(Sled.Address);
64+
uint32_t *FirstAddress = reinterpret_cast<uint32_t *>(Sled.address());
6565
uint32_t *CurAddress = FirstAddress + 1;
6666
if (Enable) {
6767
*CurAddress = uint32_t(PatchOpcodes::PO_LdrW0_12);

‎compiler-rt/lib/xray/xray_arm.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -102,7 +102,7 @@ inline static bool patchSled(const bool Enable, const uint32_t FuncId,
102102
// When |Enable|==false, we set back the first instruction in the sled to be
103103
// B #20
104104

105-
uint32_t *FirstAddress = reinterpret_cast<uint32_t *>(Sled.Address);
105+
uint32_t *FirstAddress = reinterpret_cast<uint32_t *>(Sled.address());
106106
uint32_t *CurAddress = FirstAddress + 1;
107107
if (Enable) {
108108
CurAddress =

‎compiler-rt/lib/xray/xray_interface_internal.h

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -30,16 +30,10 @@ struct XRaySledEntry {
3030
unsigned char Version;
3131
unsigned char Padding[13]; // Need 32 bytes
3232
uint64_t address() const {
33-
#ifndef __x86_64__
34-
// R_MIPS_PC64 does not exist. Use absolute address even for version 2.
35-
return Address;
36-
#else
37-
// TODO Eventually all targets but MIPS64 should take this branch.
3833
if (Version < 2)
3934
return Address;
4035
// The target address is relative to the location of the Address variable.
4136
return reinterpret_cast<uint64_t>(&Address) + Address;
42-
#endif
4337
}
4438
#elif SANITIZER_WORDSIZE == 32
4539
uint32_t Address;
@@ -48,7 +42,12 @@ struct XRaySledEntry {
4842
unsigned char AlwaysInstrument;
4943
unsigned char Version;
5044
unsigned char Padding[5]; // Need 16 bytes
51-
uint32_t address() const { return Address; }
45+
uint32_t address() const {
46+
if (Version < 2)
47+
return Address;
48+
// The target address is relative to the location of the Address variable.
49+
return reinterpret_cast<uint32_t>(&Address) + Address;
50+
}
5251
#else
5352
#error "Unsupported word size."
5453
#endif

‎compiler-rt/lib/xray/xray_powerpc64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ namespace __xray {
5252
bool patchFunctionEntry(const bool Enable, uint32_t FuncId,
5353
const XRaySledEntry &Sled,
5454
void (*Trampoline)()) XRAY_NEVER_INSTRUMENT {
55-
const uint64_t Address = Sled.Address;
55+
const uint64_t Address = Sled.address();
5656
if (Enable) {
5757
// lis 0, FuncId[16..32]
5858
// li 0, FuncId[0..15]
@@ -70,7 +70,7 @@ bool patchFunctionEntry(const bool Enable, uint32_t FuncId,
7070

7171
bool patchFunctionExit(const bool Enable, uint32_t FuncId,
7272
const XRaySledEntry &Sled) XRAY_NEVER_INSTRUMENT {
73-
const uint64_t Address = Sled.Address;
73+
const uint64_t Address = Sled.address();
7474
if (Enable) {
7575
// lis 0, FuncId[16..32]
7676
// li 0, FuncId[0..15]

‎llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3302,8 +3302,9 @@ void AsmPrinter::emitXRayTable() {
33023302
MCSection *InstMap = nullptr;
33033303
MCSection *FnSledIndex = nullptr;
33043304
const Triple &TT = TM.getTargetTriple();
3305-
// Version 2 uses a PC-relative address on all supported targets.
3306-
bool PCRel = TT.isX86();
3305+
// Use PC-relative addresses on all targets except MIPS (MIPS64 cannot use
3306+
// PC-relative addresses because R_MIPS_PC64 does not exist).
3307+
bool PCRel = !TT.isMIPS();
33073308
if (TT.isOSBinFormatELF()) {
33083309
auto LinkedToSym = cast<MCSymbolELF>(CurrentFnSym);
33093310
auto Flags = ELF::SHF_ALLOC | ELF::SHF_LINK_ORDER;

‎llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -329,7 +329,7 @@ void AArch64AsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind)
329329
EmitToStreamer(*OutStreamer, MCInstBuilder(AArch64::HINT).addImm(0));
330330

331331
OutStreamer->emitLabel(Target);
332-
recordSled(CurSled, MI, Kind);
332+
recordSled(CurSled, MI, Kind, 2);
333333
}
334334

335335
void AArch64AsmPrinter::LowerHWASAN_CHECK_MEMACCESS(const MachineInstr &MI) {

‎llvm/lib/Target/ARM/ARMMCInstLower.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -210,7 +210,7 @@ void ARMAsmPrinter::EmitSled(const MachineInstr &MI, SledKind Kind)
210210
emitNops(NoopsInSledCount);
211211

212212
OutStreamer->emitLabel(Target);
213-
recordSled(CurSled, MI, Kind);
213+
recordSled(CurSled, MI, Kind, 2);
214214
}
215215

216216
void ARMAsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI)

‎llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1181,7 +1181,7 @@ void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) {
11811181
OutContext)));
11821182
EmitToStreamer(*OutStreamer, MCInstBuilder(PPC::MTLR8).addReg(PPC::X0));
11831183
OutStreamer->emitLabel(EndOfSled);
1184-
recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER);
1184+
recordSled(BeginOfSled, *MI, SledKind::FUNCTION_ENTER, 2);
11851185
break;
11861186
}
11871187
case TargetOpcode::PATCHABLE_RET: {
@@ -1269,7 +1269,7 @@ void PPCLinuxAsmPrinter::emitInstruction(const MachineInstr *MI) {
12691269
EmitToStreamer(*OutStreamer, RetInst);
12701270
if (IsConditional)
12711271
OutStreamer->emitLabel(FallthroughLabel);
1272-
recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT);
1272+
recordSled(BeginOfSled, *MI, SledKind::FUNCTION_EXIT, 2);
12731273
break;
12741274
}
12751275
case TargetOpcode::PATCHABLE_FUNCTION_EXIT:

‎llvm/test/CodeGen/AArch64/xray-tail-call-sled.ll

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -28,9 +28,11 @@ define i32 @callee() nounwind noinline uwtable "function-instrument"="xray-alway
2828
; CHECK-NEXT: ret
2929
}
3030
; CHECK-LABEL: xray_instr_map
31-
; CHECK-LABEL: Lxray_sleds_start0:
32-
; CHECK: .xword .Lxray_sled_0
33-
; CHECK: .xword .Lxray_sled_1
31+
; CHECK-LABEL: .Lxray_sleds_start0:
32+
; CHECK-NEXT: .Ltmp2:
33+
; CHECK: .xword .Lxray_sled_0-.Ltmp2
34+
; CHECK: .Ltmp3:
35+
; CHECK-NEXT: .xword .Lxray_sled_1-.Ltmp3
3436
; CHECK-LABEL: Lxray_sleds_end0:
3537
; CHECK-LABEL: xray_fn_idx
3638
; CHECK: .xword .Lxray_sleds_start0
@@ -47,7 +49,7 @@ define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-alway
4749
; CHECK-NEXT: nop
4850
; CHECK-NEXT: nop
4951
; CHECK-NEXT: nop
50-
; CHECK-LABEL: .Ltmp2:
52+
; CHECK-LABEL: .Ltmp4:
5153
; CHECK: .p2align 2
5254
; CHECK-LABEL: Lxray_sled_3:
5355
; CHECK-NEXT: b #32
@@ -58,7 +60,7 @@ define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-alway
5860
; CHECK-NEXT: nop
5961
; CHECK-NEXT: nop
6062
; CHECK-NEXT: nop
61-
; CHECK-LABEL: .Ltmp3:
63+
; CHECK-LABEL: .Ltmp5:
6264
%retval = tail call i32 @callee()
6365
; CHECK: b callee
6466
ret i32 %retval

‎llvm/test/CodeGen/ARM/xray-tail-call-sled.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@ define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-alway
3737
; CHECK-NEXT: nop
3838
; CHECK-NEXT: nop
3939
; CHECK-NEXT: nop
40-
; CHECK-LABEL: Ltmp2:
40+
; CHECK-LABEL: Ltmp4:
4141
; CHECK: .p2align 2
4242
; CHECK-LABEL: Lxray_sled_3:
4343
; CHECK-NEXT: b #20
@@ -47,7 +47,7 @@ define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-alway
4747
; CHECK-NEXT: nop
4848
; CHECK-NEXT: nop
4949
; CHECK-NEXT: nop
50-
; CHECK-LABEL: Ltmp3:
50+
; CHECK-LABEL: Ltmp5:
5151
%retval = tail call i32 @callee()
5252
; CHECK: b {{.*}}callee
5353
ret i32 %retval

‎llvm/test/CodeGen/PowerPC/xray-attribute-instrumentation.ll

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -22,19 +22,21 @@ define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always"
2222
; CHECK-NEXT: nop
2323
; CHECK-NEXT: mtlr 0
2424
}
25-
; CHECK-LABEL: xray_instr_map,"awo",@progbits,foo{{$}}
25+
; CHECK-LABEL: xray_instr_map,"ao",@progbits,foo{{$}}
2626
; CHECK: .Lxray_sleds_start0:
27-
; CHECK-NEXT: .quad .Ltmp0
27+
; CHECK-NEXT: .Ltmp3:
28+
; CHECK-NEXT: .quad .Ltmp0-.Ltmp3
2829
; CHECK-NEXT: .quad foo
2930
; CHECK-NEXT: .byte 0x00
3031
; CHECK-NEXT: .byte 0x01
31-
; CHECK-NEXT: .byte 0x00
32+
; CHECK-NEXT: .byte 0x02
3233
; CHECK-NEXT: .space 13
33-
; CHECK-NEXT: .quad .Ltmp2
34+
; CHECK-NEXT: .Ltmp4:
35+
; CHECK-NEXT: .quad .Ltmp2-.Ltmp4
3436
; CHECK-NEXT: .quad foo
3537
; CHECK-NEXT: .byte 0x01
3638
; CHECK-NEXT: .byte 0x01
37-
; CHECK-NEXT: .byte 0x00
39+
; CHECK-NEXT: .byte 0x02
3840
; CHECK-NEXT: .space 13
3941
; CHECK-NEXT: .Lxray_sleds_end0:
4042
; CHECK-LABEL: xray_fn_idx,"awo",@progbits,foo{{$}}

‎llvm/test/CodeGen/PowerPC/xray-tail-call-sled.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -22,18 +22,18 @@ define i32 @callee() nounwind noinline uwtable "function-instrument"="xray-alway
2222
}
2323

2424
define i32 @caller() nounwind noinline uwtable "function-instrument"="xray-always" {
25-
; CHECK-LABEL: .Ltmp3:
26-
; CHECK: b .Ltmp4
25+
; CHECK-LABEL: .Ltmp5:
26+
; CHECK-NEXT: b .Ltmp6
2727
; CHECK-NEXT: nop
2828
; CHECK-NEXT: std 0, -8(1)
2929
; CHECK-NEXT: mflr 0
3030
; CHECK-NEXT: bl __xray_FunctionEntry
3131
; CHECK-NEXT: nop
3232
; CHECK-NEXT: mtlr 0
33-
; CHECK-LABEL: .Ltmp4:
33+
; CHECK-LABEL: .Ltmp6:
3434
%retval = tail call i32 @callee()
3535
ret i32 %retval
36-
; CHECK-LABEL: .Ltmp5:
36+
; CHECK-LABEL: .Ltmp7:
3737
; CHECK: blr
3838
; CHECK-NEXT: nop
3939
; CHECK-NEXT: std 0, -8(1)

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