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[CostModel][LoopVectorize] Move some loop vectoriser tests (llvm#113702)
Many tests that were in test/Analysis/CostModel were actually loop vectoriser tests. I've moved them as follows: Analysis/CostModel/X86 -> Transforms/LoopVectorize/X86/CostModel Analysis/CostModel/AArch64/arith-fp-frem.ll -> Transforms/LoopVectorize/AArch64/arith-fp-frem-costs.ll
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‎llvm/test/Analysis/CostModel/AArch64/arith-fp-frem.ll renamed to ‎llvm/test/Transforms/LoopVectorize/AArch64/arith-fp-frem-costs.ll

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‎llvm/test/Analysis/CostModel/X86/gather-i16-with-i8-index.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i16-with-i8-index.ll

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‎llvm/test/Analysis/CostModel/X86/gather-i32-with-i8-index.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i32-with-i8-index.ll

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‎llvm/test/Analysis/CostModel/X86/gather-i64-with-i8-index.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i64-with-i8-index.ll

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‎llvm/test/Analysis/CostModel/X86/gather-i8-with-i8-index.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i8-with-i8-index.ll

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‎llvm/test/Analysis/CostModel/X86/handle-iptr-with-data-layout-to-not-assert.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-5.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-7.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-7.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-8.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-8.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-2.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-3.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-4.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-5.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-5.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-6.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-6.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-7.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-7.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-8.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-8.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-half.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-7.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-8.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-8.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2-indices-0u.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-01u.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-0uu.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-012u.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-01uu.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-01uu.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-0uuu.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-5.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-5.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-7.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-7.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-8.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-8.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-2.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-3.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-4.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-5.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-5.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-6.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-6.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-7.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-7.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-8.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-8.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-4.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-5.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-7.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-8.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-8.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-5.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-8.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-8.ll

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‎llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll

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‎llvm/test/Analysis/CostModel/X86/masked-store-i8.ll renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll

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