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Revert "[IR] Avoid creating icmp/fcmp constant expressions" (llvm#93087)
Reverts llvm#92885 due to LLDB CI breakages.
1 parent da88e7f commit 8baf96f

40 files changed

+256
-353
lines changed

‎clang/test/Analysis/builtin_signbit.cpp

Lines changed: 17 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -84,30 +84,28 @@ long double ld = -1.0L;
8484
// CHECK-LE-LABEL: define dso_local void @_Z12test_signbitv(
8585
// CHECK-LE-SAME: ) #[[ATTR0:[0-9]+]] {
8686
// CHECK-LE-NEXT: entry:
87-
// CHECK-LE-NEXT: [[TMP0:%.*]] = icmp slt i64 trunc (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128) to i64), 0
88-
// CHECK-LE-NEXT: [[FROMBOOL:%.*]] = zext i1 [[TMP0]] to i8
87+
// CHECK-LE-NEXT: [[FROMBOOL:%.*]] = zext i1 icmp slt (i64 trunc (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128) to i64), i64 0) to i8
8988
// CHECK-LE-NEXT: store i8 [[FROMBOOL]], ptr @b, align 1
90-
// CHECK-LE-NEXT: [[TMP1:%.*]] = load ppc_fp128, ptr @ld, align 16
91-
// CHECK-LE-NEXT: [[TMP2:%.*]] = bitcast ppc_fp128 [[TMP1]] to i128
92-
// CHECK-LE-NEXT: [[TMP3:%.*]] = trunc i128 [[TMP2]] to i64
93-
// CHECK-LE-NEXT: [[TMP4:%.*]] = icmp slt i64 [[TMP3]], 0
94-
// CHECK-LE-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TMP4]] to i8
89+
// CHECK-LE-NEXT: [[TMP0:%.*]] = load ppc_fp128, ptr @ld, align 16
90+
// CHECK-LE-NEXT: [[TMP1:%.*]] = bitcast ppc_fp128 [[TMP0]] to i128
91+
// CHECK-LE-NEXT: [[TMP2:%.*]] = trunc i128 [[TMP1]] to i64
92+
// CHECK-LE-NEXT: [[TMP3:%.*]] = icmp slt i64 [[TMP2]], 0
93+
// CHECK-LE-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[TMP3]] to i8
9594
// CHECK-LE-NEXT: store i8 [[FROMBOOL1]], ptr @b, align 1
9695
// CHECK-LE-NEXT: store i8 0, ptr @b, align 1
97-
// CHECK-LE-NEXT: [[TMP5:%.*]] = load double, ptr @d, align 8
98-
// CHECK-LE-NEXT: [[CONV:%.*]] = fptrunc double [[TMP5]] to float
99-
// CHECK-LE-NEXT: [[TMP6:%.*]] = bitcast float [[CONV]] to i32
100-
// CHECK-LE-NEXT: [[TMP7:%.*]] = icmp slt i32 [[TMP6]], 0
101-
// CHECK-LE-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TMP7]] to i8
96+
// CHECK-LE-NEXT: [[TMP4:%.*]] = load double, ptr @d, align 8
97+
// CHECK-LE-NEXT: [[CONV:%.*]] = fptrunc double [[TMP4]] to float
98+
// CHECK-LE-NEXT: [[TMP5:%.*]] = bitcast float [[CONV]] to i32
99+
// CHECK-LE-NEXT: [[TMP6:%.*]] = icmp slt i32 [[TMP5]], 0
100+
// CHECK-LE-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[TMP6]] to i8
102101
// CHECK-LE-NEXT: store i8 [[FROMBOOL2]], ptr @b, align 1
103-
// CHECK-LE-NEXT: [[TMP8:%.*]] = icmp slt i64 trunc (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128) to i64), 0
104-
// CHECK-LE-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[TMP8]] to i8
102+
// CHECK-LE-NEXT: [[FROMBOOL3:%.*]] = zext i1 icmp slt (i64 trunc (i128 bitcast (ppc_fp128 0xM3FF00000000000000000000000000000 to i128) to i64), i64 0) to i8
105103
// CHECK-LE-NEXT: store i8 [[FROMBOOL3]], ptr @b, align 1
106-
// CHECK-LE-NEXT: [[TMP9:%.*]] = load ppc_fp128, ptr @ld, align 16
107-
// CHECK-LE-NEXT: [[TMP10:%.*]] = bitcast ppc_fp128 [[TMP9]] to i128
108-
// CHECK-LE-NEXT: [[TMP11:%.*]] = trunc i128 [[TMP10]] to i64
109-
// CHECK-LE-NEXT: [[TMP12:%.*]] = icmp slt i64 [[TMP11]], 0
110-
// CHECK-LE-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TMP12]] to i8
104+
// CHECK-LE-NEXT: [[TMP7:%.*]] = load ppc_fp128, ptr @ld, align 16
105+
// CHECK-LE-NEXT: [[TMP8:%.*]] = bitcast ppc_fp128 [[TMP7]] to i128
106+
// CHECK-LE-NEXT: [[TMP9:%.*]] = trunc i128 [[TMP8]] to i64
107+
// CHECK-LE-NEXT: [[TMP10:%.*]] = icmp slt i64 [[TMP9]], 0
108+
// CHECK-LE-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[TMP10]] to i8
111109
// CHECK-LE-NEXT: store i8 [[FROMBOOL4]], ptr @b, align 1
112110
// CHECK-LE-NEXT: ret void
113111
//

‎clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c

Lines changed: 22 additions & 40 deletions
Large diffs are not rendered by default.

‎clang/test/CodeGen/constantexpr-fneg.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,7 @@
88
// CHECK: entry:
99
// CHECK-NEXT: %retval = alloca i32
1010
// CHECK-NEXT: store i32 0, ptr %retval
11-
// CHECK-NEXT: [[CMP:%.*]] = icmp ne ptr @b, @a
12-
// CHECK-NEXT: [[ZEXT:%.*]] = zext i1 [[CMP]] to i32
11+
// CHECK-NEXT: [[ZEXT:%.*]] = zext i1 true to i32
1312
// CHECK-NEXT: [[SITOFP:%.*]] = sitofp i32 [[ZEXT]] to float
1413
// CHECK-NEXT: [[LV:%.*]] = load ptr, ptr @c
1514
// CHECK-NEXT: store float [[SITOFP]], ptr [[LV]], align 4

‎clang/test/CodeGenCXX/cxx11-thread-local.cpp

Lines changed: 8 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -136,9 +136,8 @@ int f() {
136136
// CHECK-NEXT: store i32 %{{.*}}, ptr @c, align 4
137137

138138
// LINUX_AIX-LABEL: define linkonce_odr hidden noundef ptr @_ZTW1b()
139-
// LINUX: [[CMP:%.*]] = icmp ne ptr @_ZTH1b, null
140-
// LINUX: br i1 [[CMP]]
141-
// AIX-NOT: [[CMP:%.*]] = icmp ne ptr @_ZTH1b, null
139+
// LINUX: br i1 icmp ne (ptr @_ZTH1b, ptr null),
140+
// AIX-NOT: br i1 icmp ne (ptr @_ZTH1b, ptr null),
142141
// not null:
143142
// LINUX_AIX: call void @_ZTH1b()
144143
// LINUX: br label
@@ -220,27 +219,24 @@ int f() {
220219

221220
// DARWIN: declare cxx_fast_tlscc noundef ptr @_ZTWN1VIcE1mE()
222221
// LINUX_AIX: define linkonce_odr hidden noundef ptr @_ZTWN1VIcE1mE() {{#[0-9]+}}{{( comdat)?}} {
223-
// LINUX: [[CMP:%.*]] = icmp ne ptr @_ZTHN1VIcE1mE,
224-
// LINUX: br i1 [[CMP]]
225-
// AIX-NOT: [[CMP:%.*]] = icmp ne ptr @_ZTHN1VIcE1mE,
222+
// LINUX: br i1 icmp ne (ptr @_ZTHN1VIcE1mE,
223+
// AIX-NOT: br i1 icmp ne (ptr @_ZTHN1VIcE1mE
226224
// LINUX_AIX: call void @_ZTHN1VIcE1mE()
227225
// LINUX_AIX: [[VEM_ADDR:%.+]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_ZN1VIcE1mE)
228226
// LINUX_AIX: ret ptr [[VEM_ADDR]]
229227

230228
// DARWIN: declare cxx_fast_tlscc noundef ptr @_ZTWN1WIcE1mE()
231229
// LINUX_AIX: define linkonce_odr hidden noundef ptr @_ZTWN1WIcE1mE() {{#[0-9]+}}{{( comdat)?}} {
232-
// LINUX: [[CMP:%.*]] = icmp ne ptr @_ZTHN1WIcE1mE,
233-
// LINUX: br i1 [[CMP]]
234-
// AIX-NOT: [[CMP:%.*]] = icmp ne ptr @_ZTHN1WIcE1mE,
230+
// LINUX: br i1 icmp ne (ptr @_ZTHN1WIcE1mE,
231+
// AIX-NOT: br i1 icmp ne (ptr @_ZTHN1WIcE1mE,
235232
// LINUX_AIX: call void @_ZTHN1WIcE1mE()
236233
// LINUX_AIX: [[WEM_ADDR:%.+]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @_ZN1WIcE1mE)
237234
// LINUX_AIX: ret ptr [[WEM_ADDR]]
238235

239236
// DARWIN: declare cxx_fast_tlscc {{.*}}ptr @_ZTWN1XIcE1mE()
240237
// LINUX_AIX: define linkonce_odr hidden {{.*}}ptr @_ZTWN1XIcE1mE() {{#[0-9]+}}{{( comdat)?}} {
241-
// LINUX: [[CMP:%.*]] = icmp ne ptr @_ZTHN1XIcE1mE,
242-
// LINUX: br i1 [[CMP]]
243-
// AIX-NOT: [[CMP:%.*]] = icmp ne ptr @_ZTHN1XIcE1mE,
238+
// LINUX: br i1 icmp ne (ptr @_ZTHN1XIcE1mE,
239+
// AIX-NOT: br i1 icmp ne (ptr @_ZTHN1XIcE1mE,
244240
// LINUX_AIX: call void @_ZTHN1XIcE1mE()
245241
// LINUX_AIX: [[XEM_ADDR:%.+]] = call align 1 ptr @llvm.threadlocal.address.p0(ptr align 1 @_ZN1XIcE1mE)
246242
// LINUX_AIX: ret ptr [[XEM_ADDR]]

‎clang/test/CodeGenCXX/ubsan-nullability-arg.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,8 +10,7 @@ struct S0 {
1010
void foo1(void (S0::*_Nonnull f)());
1111

1212
// ITANIUM-LABEL: @_ZN10method_ptr5test1Ev(){{.*}} {
13-
// ITANIUM: [[CMP:%.*]] = icmp ne i64 ptrtoint (ptr @_ZN10method_ptr2S04foo1Ev to i64), 0
14-
// ITANIUM: br i1 [[CMP]], label %[[CONT:.*]], label %[[FAIL:[^,]*]]
13+
// ITANIUM: br i1 icmp ne (i64 ptrtoint (ptr @_ZN10method_ptr2S04foo1Ev to i64), i64 0), label %[[CONT:.*]], label %[[FAIL:[^,]*]]
1514
// ITANIUM-EMPTY:
1615
// ITANIUM-NEXT: [[FAIL]]:
1716
// ITANIUM-NEXT: call void @__ubsan_handle_nullability_arg

‎clang/test/CodeGenCXX/weak-external.cpp

Lines changed: 4 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -80,30 +80,23 @@ namespace not_weak_on_first {
8080
namespace constant_eval {
8181
[[gnu::weak]] extern int a;
8282
// CHECK-LABEL: define {{.*}} @__cxx_global_var_init
83-
// CHECK: [[CMP:%.*]] = icmp ne ptr @_ZN13constant_eval1aE, null
84-
// CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i8
83+
// CHECK: [[ZEXT:%.*]] = zext i1 icmp ne (ptr @_ZN13constant_eval1aE, ptr null) to i8
8584
// CHECK: store i8 [[ZEXT]], ptr @_ZN13constant_eval6has_a1E,
8685
bool has_a1 = &a;
8786
// CHECK-LABEL: define {{.*}} @__cxx_global_var_init
88-
// CHECK: [[CMP:%.*]] = icmp ne ptr @_ZN13constant_eval1aE, null
89-
// CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i8
87+
// CHECK: [[ZEXT:%.*]] = zext i1 icmp ne (ptr @_ZN13constant_eval1aE, ptr null) to i8
9088
// CHECK: store i8 [[ZEXT]], ptr @_ZN13constant_eval6has_a2E,
9189
bool has_a2 = &a != nullptr;
9290

9391
struct X {
9492
[[gnu::weak]] void f();
9593
};
9694
// CHECK-LABEL: define {{.*}} @__cxx_global_var_init
97-
// CHECK: [[CMP:%.*]] = icmp ne i{{32|64}} ptrtoint (ptr @_ZN13constant_eval1X1fEv to i{{32|64}}), 0
98-
// CHECK: [[ZEXT:%.*]] = zext i1 [[CMP]] to i8
95+
// CHECK: [[ZEXT:%.*]] = zext i1 icmp ne (i{{32|64}} ptrtoint (ptr @_ZN13constant_eval1X1fEv to i{{32|64}}), i{{32|64}} 0) to i8
9996
// CHECK: store i8 [[ZEXT]], ptr @_ZN13constant_eval6has_f1E,
10097
bool has_f1 = &X::f;
10198
// CHECK-LABEL: define {{.*}} @__cxx_global_var_init
102-
// CHECK: [[CMP:%.*]] = icmp ne i{{32|64}} ptrtoint (ptr @_ZN13constant_eval1X1fEv to i{{32|64}}), 0
103-
// CHECK: [[CMP2:%.*]] = icmp ne i{{32|64}} ptrtoint (ptr @_ZN13constant_eval1X1fEv to i{{32|64}}), 0
104-
// CHECK: [[AND:%.*]] = and i1 [[CMP2]], false
105-
// CHECK: [[OR:%.*]] = or i1 [[CMP]], [[AND]]
106-
// CHECK: [[ZEXT:%.*]] = zext i1 [[OR]] to i8
99+
// CHECK: [[ZEXT:%.*]] = zext i1 icmp ne (i{{32|64}} ptrtoint (ptr @_ZN13constant_eval1X1fEv to i{{32|64}}), i{{32|64}} 0) to i8
107100
// CHECK: store i8 [[ZEXT]], ptr @_ZN13constant_eval6has_f2E,
108101
bool has_f2 = &X::f != nullptr;
109102
}

‎clang/test/Driver/linker-wrapper-image.c

Lines changed: 48 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -83,33 +83,32 @@
8383

8484
// CUDA: define internal void @.cuda.globals_reg(ptr %0) section ".text.startup" {
8585
// CUDA-NEXT: entry:
86-
// CUDA-NEXT: %1 = icmp ne ptr @__start_cuda_offloading_entries, @__stop_cuda_offloading_entries
87-
// CUDA-NEXT: br i1 %1, label %while.entry, label %while.end
86+
// CUDA-NEXT: br i1 icmp ne (ptr @__start_cuda_offloading_entries, ptr @__stop_cuda_offloading_entries), label %while.entry, label %while.end
8887

8988
// CUDA: while.entry:
90-
// CUDA-NEXT: %entry1 = phi ptr [ @__start_cuda_offloading_entries, %entry ], [ %12, %if.end ]
91-
// CUDA-NEXT: %2 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 0
92-
// CUDA-NEXT: %addr = load ptr, ptr %2, align 8
93-
// CUDA-NEXT: %3 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 1
94-
// CUDA-NEXT: %name = load ptr, ptr %3, align 8
95-
// CUDA-NEXT: %4 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 2
96-
// CUDA-NEXT: %size = load i64, ptr %4, align 4
97-
// CUDA-NEXT: %5 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 3
98-
// CUDA-NEXT: %flags = load i32, ptr %5, align 4
99-
// CUDA-NEXT: %6 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 4
100-
// CUDA-NEXT: %textype = load i32, ptr %6, align 4
89+
// CUDA-NEXT: %entry1 = phi ptr [ @__start_cuda_offloading_entries, %entry ], [ %11, %if.end ]
90+
// CUDA-NEXT: %1 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 0
91+
// CUDA-NEXT: %addr = load ptr, ptr %1, align 8
92+
// CUDA-NEXT: %2 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 1
93+
// CUDA-NEXT: %name = load ptr, ptr %2, align 8
94+
// CUDA-NEXT: %3 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 2
95+
// CUDA-NEXT: %size = load i64, ptr %3, align 4
96+
// CUDA-NEXT: %4 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 3
97+
// CUDA-NEXT: %flags = load i32, ptr %4, align 4
98+
// CUDA-NEXT: %5 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 4
99+
// CUDA-NEXT: %textype = load i32, ptr %5, align 4
101100
// CUDA-NEXT: %type = and i32 %flags, 7
102-
// CUDA-NEXT: %7 = and i32 %flags, 8
103-
// CUDA-NEXT: %extern = lshr i32 %7, 3
104-
// CUDA-NEXT: %8 = and i32 %flags, 16
105-
// CUDA-NEXT: %constant = lshr i32 %8, 4
106-
// CUDA-NEXT: %9 = and i32 %flags, 32
107-
// CUDA-NEXT: %normalized = lshr i32 %9, 5
108-
// CUDA-NEXT: %10 = icmp eq i64 %size, 0
109-
// CUDA-NEXT: br i1 %10, label %if.then, label %if.else
101+
// CUDA-NEXT: %6 = and i32 %flags, 8
102+
// CUDA-NEXT: %extern = lshr i32 %6, 3
103+
// CUDA-NEXT: %7 = and i32 %flags, 16
104+
// CUDA-NEXT: %constant = lshr i32 %7, 4
105+
// CUDA-NEXT: %8 = and i32 %flags, 32
106+
// CUDA-NEXT: %normalized = lshr i32 %8, 5
107+
// CUDA-NEXT: %9 = icmp eq i64 %size, 0
108+
// CUDA-NEXT: br i1 %9, label %if.then, label %if.else
110109

111110
// CUDA: if.then:
112-
// CUDA-NEXT: %11 = call i32 @__cudaRegisterFunction(ptr %0, ptr %addr, ptr %name, ptr %name, i32 -1, ptr null, ptr null, ptr null, ptr null, ptr null)
111+
// CUDA-NEXT: %10 = call i32 @__cudaRegisterFunction(ptr %0, ptr %addr, ptr %name, ptr %name, i32 -1, ptr null, ptr null, ptr null, ptr null, ptr null)
113112
// CUDA-NEXT: br label %if.end
114113

115114
// CUDA: if.else:
@@ -134,9 +133,9 @@
134133
// CUDA-NEXT: br label %if.end
135134

136135
// CUDA: if.end:
137-
// CUDA-NEXT: %12 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 1
138-
// CUDA-NEXT: %13 = icmp eq ptr %12, @__stop_cuda_offloading_entries
139-
// CUDA-NEXT: br i1 %13, label %while.end, label %while.entry
136+
// CUDA-NEXT: %11 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 1
137+
// CUDA-NEXT: %12 = icmp eq ptr %11, @__stop_cuda_offloading_entries
138+
// CUDA-NEXT: br i1 %12, label %while.end, label %while.entry
140139

141140
// CUDA: while.end:
142141
// CUDA-NEXT: ret void
@@ -183,33 +182,32 @@
183182

184183
// HIP: define internal void @.hip.globals_reg(ptr %0) section ".text.startup" {
185184
// HIP-NEXT: entry:
186-
// HIP-NEXT: %1 = icmp ne ptr @__start_hip_offloading_entries, @__stop_hip_offloading_entries
187-
// HIP-NEXT: br i1 %1, label %while.entry, label %while.end
185+
// HIP-NEXT: br i1 icmp ne (ptr @__start_hip_offloading_entries, ptr @__stop_hip_offloading_entries), label %while.entry, label %while.end
188186

189187
// HIP: while.entry:
190-
// HIP-NEXT: %entry1 = phi ptr [ @__start_hip_offloading_entries, %entry ], [ %12, %if.end ]
191-
// HIP-NEXT: %2 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 0
192-
// HIP-NEXT: %addr = load ptr, ptr %2, align 8
193-
// HIP-NEXT: %3 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 1
194-
// HIP-NEXT: %name = load ptr, ptr %3, align 8
195-
// HIP-NEXT: %4 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 2
196-
// HIP-NEXT: %size = load i64, ptr %4, align 4
197-
// HIP-NEXT: %5 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 3
198-
// HIP-NEXT: %flags = load i32, ptr %5, align 4
199-
// HIP-NEXT: %6 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 4
200-
// HIP-NEXT: %textype = load i32, ptr %6, align 4
188+
// HIP-NEXT: %entry1 = phi ptr [ @__start_hip_offloading_entries, %entry ], [ %11, %if.end ]
189+
// HIP-NEXT: %1 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 0
190+
// HIP-NEXT: %addr = load ptr, ptr %1, align 8
191+
// HIP-NEXT: %2 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 1
192+
// HIP-NEXT: %name = load ptr, ptr %2, align 8
193+
// HIP-NEXT: %3 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 2
194+
// HIP-NEXT: %size = load i64, ptr %3, align 4
195+
// HIP-NEXT: %4 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 3
196+
// HIP-NEXT: %flags = load i32, ptr %4, align 4
197+
// HIP-NEXT: %5 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 0, i32 4
198+
// HIP-NEXT: %textype = load i32, ptr %5, align 4
201199
// HIP-NEXT: %type = and i32 %flags, 7
202-
// HIP-NEXT: %7 = and i32 %flags, 8
203-
// HIP-NEXT: %extern = lshr i32 %7, 3
204-
// HIP-NEXT: %8 = and i32 %flags, 16
205-
// HIP-NEXT: %constant = lshr i32 %8, 4
206-
// HIP-NEXT: %9 = and i32 %flags, 32
207-
// HIP-NEXT: %normalized = lshr i32 %9, 5
208-
// HIP-NEXT: %10 = icmp eq i64 %size, 0
209-
// HIP-NEXT: br i1 %10, label %if.then, label %if.else
200+
// HIP-NEXT: %6 = and i32 %flags, 8
201+
// HIP-NEXT: %extern = lshr i32 %6, 3
202+
// HIP-NEXT: %7 = and i32 %flags, 16
203+
// HIP-NEXT: %constant = lshr i32 %7, 4
204+
// HIP-NEXT: %8 = and i32 %flags, 32
205+
// HIP-NEXT: %normalized = lshr i32 %8, 5
206+
// HIP-NEXT: %9 = icmp eq i64 %size, 0
207+
// HIP-NEXT: br i1 %9, label %if.then, label %if.else
210208

211209
// HIP: if.then:
212-
// HIP-NEXT: %11 = call i32 @__hipRegisterFunction(ptr %0, ptr %addr, ptr %name, ptr %name, i32 -1, ptr null, ptr null, ptr null, ptr null, ptr null)
210+
// HIP-NEXT: %10 = call i32 @__hipRegisterFunction(ptr %0, ptr %addr, ptr %name, ptr %name, i32 -1, ptr null, ptr null, ptr null, ptr null, ptr null)
213211
// HIP-NEXT: br label %if.end
214212

215213
// HIP: if.else:
@@ -236,9 +234,9 @@
236234
// HIP-NEXT: br label %if.end
237235

238236
// HIP: if.end:
239-
// HIP-NEXT: %12 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 1
240-
// HIP-NEXT: %13 = icmp eq ptr %12, @__stop_hip_offloading_entries
241-
// HIP-NEXT: br i1 %13, label %while.end, label %while.entry
237+
// HIP-NEXT: %11 = getelementptr inbounds %struct.__tgt_offload_entry, ptr %entry1, i64 1
238+
// HIP-NEXT: %12 = icmp eq ptr %11, @__stop_hip_offloading_entries
239+
// HIP-NEXT: br i1 %12, label %while.end, label %while.entry
242240

243241
// HIP: while.end:
244242
// HIP-NEXT: ret void

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