Version

Yosys 0.50+56 (git sha1 9106d6b, g++ 14.2.1 -march=x86-64 -mtune=generic -O2 -fno-plt -fexceptions -fstack-clash-protection -fcf-protection -fno-omit-frame-pointer -mno-omit-leaf-frame-pointer -ffile-prefix-map=/home/prostboa/Dev/AUR/yosys-git/src=/usr/src/debug/yosys-git -flto=auto -fPIC -O3)

On which OS did this happen?

Linux

Reproduction Steps

Try to synthesize this (erroneous) design:

module comp #(
	localparam LP = 32
) (
	output wire [LP-1:0] odata
);

	assign odata = 0;

endmodule

module top #(
	parameter LP = 32
) (
	output wire [LP-1:0] oport
);

	wire [LP-1:0] owire;

	comp #(
		.LP(LP)
	 )
	comp_inst (
		.odata(owire)
	);

	assign oport = owire;

endmodule

Synthesize with this command:

yosys -l yosys.log -p "synth_xilinx -arch xc7 -top top ; write_json top.json" top.v

Expected Behavior

The error message should indicate that overriding localparams is illegal, and indicate the name of the related parameter.
So the root cause of the error can be found even in a very large design.

Actual Behavior

The error message mentions defparams, which is very misleading because defparam is a verilog keyword that is not used in the design.
The error message is extremely difficult to understand and does not indicate what parameter is related to the issue:

2.4.2. Executing AST frontend in derive mode using pre-parsed AST for module `\comp'.
Generating RTLIL representation for module `$paramod\comp'.
top.v:0: ERROR: Module name in defparam contains non-constant expressions!