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[X86][NFC] Remove dead code for "_REV" instructions
Those "_REV" instructions should not appear before encoding optimization, while macro fusion and flag-copy lowering are before encoding optimization.
1 parent 4b9bbd3 commit 8bbf100

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-17
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2 files changed

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-17
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llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h

Lines changed: 0 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -148,25 +148,21 @@ classifyFirstOpcodeInMacroFusion(unsigned Opcode) {
148148
case X86::AND16ri8:
149149
case X86::AND16rm:
150150
case X86::AND16rr:
151-
case X86::AND16rr_REV:
152151
case X86::AND32i32:
153152
case X86::AND32ri:
154153
case X86::AND32ri8:
155154
case X86::AND32rm:
156155
case X86::AND32rr:
157-
case X86::AND32rr_REV:
158156
case X86::AND64i32:
159157
case X86::AND64ri32:
160158
case X86::AND64ri8:
161159
case X86::AND64rm:
162160
case X86::AND64rr:
163-
case X86::AND64rr_REV:
164161
case X86::AND8i8:
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case X86::AND8ri:
166163
case X86::AND8ri8:
167164
case X86::AND8rm:
168165
case X86::AND8rr:
169-
case X86::AND8rr_REV:
170166
return FirstMacroFusionInstKind::And;
171167
// CMP
172168
case X86::CMP16i16:
@@ -175,79 +171,67 @@ classifyFirstOpcodeInMacroFusion(unsigned Opcode) {
175171
case X86::CMP16ri8:
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case X86::CMP16rm:
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case X86::CMP16rr:
178-
case X86::CMP16rr_REV:
179174
case X86::CMP32i32:
180175
case X86::CMP32mr:
181176
case X86::CMP32ri:
182177
case X86::CMP32ri8:
183178
case X86::CMP32rm:
184179
case X86::CMP32rr:
185-
case X86::CMP32rr_REV:
186180
case X86::CMP64i32:
187181
case X86::CMP64mr:
188182
case X86::CMP64ri32:
189183
case X86::CMP64ri8:
190184
case X86::CMP64rm:
191185
case X86::CMP64rr:
192-
case X86::CMP64rr_REV:
193186
case X86::CMP8i8:
194187
case X86::CMP8mr:
195188
case X86::CMP8ri:
196189
case X86::CMP8ri8:
197190
case X86::CMP8rm:
198191
case X86::CMP8rr:
199-
case X86::CMP8rr_REV:
200192
return FirstMacroFusionInstKind::Cmp;
201193
// ADD
202194
case X86::ADD16i16:
203195
case X86::ADD16ri:
204196
case X86::ADD16ri8:
205197
case X86::ADD16rm:
206198
case X86::ADD16rr:
207-
case X86::ADD16rr_REV:
208199
case X86::ADD32i32:
209200
case X86::ADD32ri:
210201
case X86::ADD32ri8:
211202
case X86::ADD32rm:
212203
case X86::ADD32rr:
213-
case X86::ADD32rr_REV:
214204
case X86::ADD64i32:
215205
case X86::ADD64ri32:
216206
case X86::ADD64ri8:
217207
case X86::ADD64rm:
218208
case X86::ADD64rr:
219-
case X86::ADD64rr_REV:
220209
case X86::ADD8i8:
221210
case X86::ADD8ri:
222211
case X86::ADD8ri8:
223212
case X86::ADD8rm:
224213
case X86::ADD8rr:
225-
case X86::ADD8rr_REV:
226214
// SUB
227215
case X86::SUB16i16:
228216
case X86::SUB16ri:
229217
case X86::SUB16ri8:
230218
case X86::SUB16rm:
231219
case X86::SUB16rr:
232-
case X86::SUB16rr_REV:
233220
case X86::SUB32i32:
234221
case X86::SUB32ri:
235222
case X86::SUB32ri8:
236223
case X86::SUB32rm:
237224
case X86::SUB32rr:
238-
case X86::SUB32rr_REV:
239225
case X86::SUB64i32:
240226
case X86::SUB64ri32:
241227
case X86::SUB64ri8:
242228
case X86::SUB64rm:
243229
case X86::SUB64rr:
244-
case X86::SUB64rr_REV:
245230
case X86::SUB8i8:
246231
case X86::SUB8ri:
247232
case X86::SUB8ri8:
248233
case X86::SUB8rm:
249234
case X86::SUB8rr:
250-
case X86::SUB8rr_REV:
251235
return FirstMacroFusionInstKind::AddSub;
252236
// INC
253237
case X86::INC16r:

llvm/lib/Target/X86/X86FlagsCopyLowering.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -173,7 +173,6 @@ static FlagArithMnemonic getMnemonicFromOpcode(unsigned Opcode) {
173173

174174
#define LLVM_EXPAND_ADC_SBB_INSTR(MNEMONIC) \
175175
LLVM_EXPAND_INSTR_SIZES(MNEMONIC, rr) \
176-
LLVM_EXPAND_INSTR_SIZES(MNEMONIC, rr_REV) \
177176
LLVM_EXPAND_INSTR_SIZES(MNEMONIC, rm) \
178177
LLVM_EXPAND_INSTR_SIZES(MNEMONIC, mr) \
179178
case X86::MNEMONIC##8ri: \

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