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[X86][SSE] Add shuffled load tests from PR16739
llvm-svn: 369112
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‎llvm/test/CodeGen/X86/load-partial.ll

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@@ -31,6 +31,45 @@ define <4 x float> @load_float4_float3(<4 x float>* nocapture readonly dereferen
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ret <4 x float> %r2
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}
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define <4 x float> @load_float4_float3_0122(<4 x float>* nocapture readonly dereferenceable(16)) {
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; SSE2-LABEL: load_float4_float3_0122:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSE2-NEXT: movups (%rdi), %xmm0
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; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: load_float4_float3_0122:
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; SSSE3: # %bb.0:
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; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSSE3-NEXT: movups (%rdi), %xmm0
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; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
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; SSSE3-NEXT: retq
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;
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; SSE41-LABEL: load_float4_float3_0122:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movups (%rdi), %xmm0
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; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: load_float4_float3_0122:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovups (%rdi), %xmm0
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; AVX-NEXT: retq
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%p0 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 0
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%p1 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 1
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%p2 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
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%ld0 = load float, float* %p0, align 4
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%ld1 = load float, float* %p1, align 4
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%ld2 = load float, float* %p2, align 4
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%r0 = insertelement <4 x float> undef, float %ld0, i32 0
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%r1 = insertelement <4 x float> %r0, float %ld1, i32 1
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%r2 = insertelement <4 x float> %r1, float %ld2, i32 2
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%r3 = insertelement <4 x float> %r1, float %ld2, i32 3
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ret <4 x float> %r3
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}
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define <8 x float> @load_float8_float3(<4 x float>* nocapture readonly dereferenceable(16)) {
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; SSE-LABEL: load_float8_float3:
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; SSE: # %bb.0:
@@ -53,6 +92,45 @@ define <8 x float> @load_float8_float3(<4 x float>* nocapture readonly dereferen
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ret <8 x float> %r2
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}
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define <8 x float> @load_float8_float3_0122(<4 x float>* nocapture readonly dereferenceable(16)) {
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; SSE2-LABEL: load_float8_float3_0122:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSE2-NEXT: movups (%rdi), %xmm0
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; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: load_float8_float3_0122:
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; SSSE3: # %bb.0:
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; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSSE3-NEXT: movups (%rdi), %xmm0
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; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
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; SSSE3-NEXT: retq
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;
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; SSE41-LABEL: load_float8_float3_0122:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movups (%rdi), %xmm0
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; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: load_float8_float3_0122:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovups (%rdi), %xmm0
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; AVX-NEXT: retq
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%p0 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 0
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%p1 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 1
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%p2 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
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%ld0 = load float, float* %p0, align 4
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%ld1 = load float, float* %p1, align 4
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%ld2 = load float, float* %p2, align 4
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%r0 = insertelement <8 x float> undef, float %ld0, i32 0
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%r1 = insertelement <8 x float> %r0, float %ld1, i32 1
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%r2 = insertelement <8 x float> %r1, float %ld2, i32 2
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%r3 = insertelement <8 x float> %r1, float %ld2, i32 3
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ret <8 x float> %r3
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}
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define <4 x float> @load_float4_float3_as_float2_float(<4 x float>* nocapture readonly dereferenceable(16)) {
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; SSE-LABEL: load_float4_float3_as_float2_float:
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; SSE: # %bb.0:
@@ -75,6 +153,47 @@ define <4 x float> @load_float4_float3_as_float2_float(<4 x float>* nocapture re
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ret <4 x float> %10
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}
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define <4 x float> @load_float4_float3_as_float2_float_0122(<4 x float>* nocapture readonly dereferenceable(16)) {
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; SSE2-LABEL: load_float4_float3_as_float2_float_0122:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
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; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: load_float4_float3_as_float2_float_0122:
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; SSSE3: # %bb.0:
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; SSSE3-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
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; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
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; SSSE3-NEXT: retq
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;
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; SSE41-LABEL: load_float4_float3_as_float2_float_0122:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: load_float4_float3_as_float2_float_0122:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; AVX-NEXT: retq
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%2 = bitcast <4 x float>* %0 to <2 x float>*
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%3 = load <2 x float>, <2 x float>* %2, align 4
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%4 = extractelement <2 x float> %3, i32 0
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%5 = insertelement <4 x float> undef, float %4, i32 0
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%6 = extractelement <2 x float> %3, i32 1
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%7 = insertelement <4 x float> %5, float %6, i32 1
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%8 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
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%9 = load float, float* %8, align 4
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%10 = insertelement <4 x float> %7, float %9, i32 2
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%11 = insertelement <4 x float> %7, float %9, i32 3
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ret <4 x float> %11
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}
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78197
define <4 x float> @load_float4_float3_trunc(<4 x float>* nocapture readonly dereferenceable(16)) {
79198
; SSE-LABEL: load_float4_float3_trunc:
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; SSE: # %bb.0:
@@ -103,6 +222,99 @@ define <4 x float> @load_float4_float3_trunc(<4 x float>* nocapture readonly der
103222
ret <4 x float> %16
104223
}
105224

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define <4 x float> @load_float4_float3_trunc_0122(<4 x float>* nocapture readonly dereferenceable(16)) {
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; SSE2-LABEL: load_float4_float3_trunc_0122:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSE2-NEXT: movaps (%rdi), %xmm0
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; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: load_float4_float3_trunc_0122:
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; SSSE3: # %bb.0:
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; SSSE3-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
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; SSSE3-NEXT: movaps (%rdi), %xmm0
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; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,0]
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; SSSE3-NEXT: retq
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;
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; SSE41-LABEL: load_float4_float3_trunc_0122:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movaps (%rdi), %xmm0
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; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: load_float4_float3_trunc_0122:
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; AVX: # %bb.0:
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; AVX-NEXT: vmovaps (%rdi), %xmm0
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; AVX-NEXT: retq
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%2 = bitcast <4 x float>* %0 to i64*
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%3 = load i64, i64* %2, align 16
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%4 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
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%5 = bitcast float* %4 to i64*
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%6 = load i64, i64* %5, align 8
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%7 = trunc i64 %3 to i32
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%8 = bitcast i32 %7 to float
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%9 = insertelement <4 x float> undef, float %8, i32 0
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%10 = lshr i64 %3, 32
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%11 = trunc i64 %10 to i32
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%12 = bitcast i32 %11 to float
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%13 = insertelement <4 x float> %9, float %12, i32 1
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%14 = trunc i64 %6 to i32
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%15 = bitcast i32 %14 to float
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%16 = insertelement <4 x float> %13, float %15, i32 2
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%17 = insertelement <4 x float> %13, float %15, i32 3
267+
ret <4 x float> %17
268+
}
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270+
define <4 x float> @load_float4_float3_trunc_0123(<4 x float>* nocapture readonly dereferenceable(16)) {
271+
; SSE2-LABEL: load_float4_float3_trunc_0123:
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; SSE2: # %bb.0:
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; SSE2-NEXT: movaps (%rdi), %xmm0
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; SSE2-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
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; SSE2-NEXT: retq
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;
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; SSSE3-LABEL: load_float4_float3_trunc_0123:
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; SSSE3: # %bb.0:
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; SSSE3-NEXT: movaps (%rdi), %xmm0
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; SSSE3-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
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; SSSE3-NEXT: retq
282+
;
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; SSE41-LABEL: load_float4_float3_trunc_0123:
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; SSE41: # %bb.0:
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; SSE41-NEXT: movaps (%rdi), %xmm0
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; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
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; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; SSE41-NEXT: retq
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;
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; AVX-LABEL: load_float4_float3_trunc_0123:
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; AVX: # %bb.0:
292+
; AVX-NEXT: vmovaps (%rdi), %xmm0
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
294+
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
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; AVX-NEXT: retq
296+
%2 = bitcast <4 x float>* %0 to i64*
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%3 = load i64, i64* %2, align 16
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%4 = getelementptr inbounds <4 x float>, <4 x float>* %0, i64 0, i64 2
299+
%5 = bitcast float* %4 to i64*
300+
%6 = load i64, i64* %5, align 8
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%7 = trunc i64 %3 to i32
302+
%8 = bitcast i32 %7 to float
303+
%9 = insertelement <4 x float> undef, float %8, i32 0
304+
%10 = lshr i64 %3, 32
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%11 = trunc i64 %10 to i32
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%12 = bitcast i32 %11 to float
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%13 = insertelement <4 x float> %9, float %12, i32 1
308+
%14 = trunc i64 %6 to i32
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%15 = bitcast i32 %14 to float
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%16 = insertelement <4 x float> %13, float %15, i32 2
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%17 = lshr i64 %6, 32
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%18 = trunc i64 %17 to i32
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%19 = bitcast i32 %18 to float
314+
%20 = insertelement <4 x float> %16, float %19, i32 3
315+
ret <4 x float> %20
316+
}
317+
106318
; PR21780
107319
define <4 x double> @load_double4_0u2u(double* nocapture readonly dereferenceable(32)) {
108320
; SSE2-LABEL: load_double4_0u2u:

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