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cmagliecmaglie
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sam: Fixed initialization of UART/USART mode register
1 parent 7e9cf6d commit 00f23d3

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4 files changed

+67
-51
lines changed

4 files changed

+67
-51
lines changed

‎hardware/arduino/sam/cores/arduino/UARTClass.cpp

+5-4
Original file line numberDiff line numberDiff line change
@@ -35,17 +35,18 @@ UARTClass::UARTClass( Uart *pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer *p
3535

3636
// Public Methods //////////////////////////////////////////////////////////////
3737

38-
void UARTClass::begin( const uint32_t dwBaudRate )
38+
void UARTClass::begin(const uint32_t dwBaudRate)
3939
{
4040
begin(dwBaudRate, Mode_8N1);
4141
}
4242

4343
void UARTClass::begin(const uint32_t dwBaudRate, const UARTModes config)
4444
{
45-
init(dwBaudRate, static_cast<uint32_t>(config));
45+
uint32_t modeReg = static_cast<uint32_t>(config) & 0x00000E00;
46+
init(dwBaudRate, modeReg | UART_MR_CHMODE_NORMAL);
4647
}
4748

48-
void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config)
49+
void UARTClass::init(const uint32_t dwBaudRate, const uint32_t modeReg)
4950
{
5051
// Configure PMC
5152
pmc_enable_periph_clk( _dwId );
@@ -57,7 +58,7 @@ void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config)
5758
_pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS;
5859

5960
// Configure mode
60-
_pUart->UART_MR = (config & 0x00000E00) | UART_MR_CHMODE_NORMAL;
61+
_pUart->UART_MR = modeReg;
6162

6263
// Configure baudrate (asynchronous, no oversampling)
6364
_pUart->UART_BRGR = (SystemCoreClock / dwBaudRate) >> 4;

‎hardware/arduino/sam/cores/arduino/UARTClass.h

+2-2
Original file line numberDiff line numberDiff line change
@@ -39,8 +39,8 @@ class UARTClass : public HardwareSerial
3939
Mode_8N1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_NO,
4040
Mode_8E1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_EVEN,
4141
Mode_8O1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_ODD,
42-
Mode_8M1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_MARK,
43-
Mode_8S1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_SPACE,
42+
Mode_8M1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_MARK,
43+
Mode_8S1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_SPACE,
4444
};
4545
UARTClass(Uart* pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer);
4646

‎hardware/arduino/sam/cores/arduino/USARTClass.cpp

+16-2
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,22 @@ USARTClass::USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffe
3232

3333
// Public Methods //////////////////////////////////////////////////////////////
3434

35-
void USARTClass::begin( const uint32_t dwBaudRate, const USARTModes config )
35+
void USARTClass::begin(const uint32_t dwBaudRate)
3636
{
37-
UARTClass::init(dwBaudRate, static_cast<uint32_t>(config));
37+
begin(dwBaudRate, Mode_8N1);
38+
}
39+
40+
void USARTClass::begin(const uint32_t dwBaudRate, const UARTModes config)
41+
{
42+
uint32_t modeReg = static_cast<uint32_t>(config);
43+
modeReg |= US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL;
44+
init(dwBaudRate, modeReg);
45+
}
46+
47+
void USARTClass::begin(const uint32_t dwBaudRate, const USARTModes config)
48+
{
49+
uint32_t modeReg = static_cast<uint32_t>(config);
50+
modeReg |= US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL;
51+
init(dwBaudRate, modeReg);
3852
}
3953

‎hardware/arduino/sam/cores/arduino/USARTClass.h

+44-43
Original file line numberDiff line numberDiff line change
@@ -65,53 +65,54 @@
6565

6666
class USARTClass : public UARTClass
6767
{
68-
protected:
69-
Usart* _pUsart;
70-
7168
public:
72-
// 8 bit modes are inherited from UARTClass
69+
// 8x1 bit modes are inherited from UARTClass
7370
enum USARTModes {
74-
Mode_5N1 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
75-
Mode_6N1 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
76-
Mode_7N1 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
77-
Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
78-
Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
79-
Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
80-
Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
81-
Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
82-
Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
83-
Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
84-
Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
85-
Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
86-
Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
87-
Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
88-
Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
89-
Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
90-
Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
91-
Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
92-
Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
93-
Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
94-
Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
95-
Mode_5M1 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
96-
Mode_6M1 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
97-
Mode_7M1 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
98-
Mode_5M2 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
99-
Mode_6M2 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
100-
Mode_7M2 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
101-
Mode_8M2 = US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
102-
Mode_5S1 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
103-
Mode_6S1 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
104-
Mode_7S1 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
105-
Mode_5S2 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
106-
Mode_6S2 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
107-
Mode_7S2 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
108-
Mode_8S2 = US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
109-
};
71+
Mode_5N1 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
72+
Mode_6N1 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
73+
Mode_7N1 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT,
74+
Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
75+
Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
76+
Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
77+
Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT,
78+
Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
79+
Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
80+
Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT,
81+
Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
82+
Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
83+
Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
84+
Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT,
85+
Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
86+
Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
87+
Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT,
88+
Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
89+
Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
90+
Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
91+
Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT,
92+
Mode_5M1 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
93+
Mode_6M1 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
94+
Mode_7M1 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT,
95+
Mode_5M2 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
96+
Mode_6M2 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
97+
Mode_7M2 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
98+
Mode_8M2 = US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT,
99+
Mode_5S1 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
100+
Mode_6S1 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
101+
Mode_7S1 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT,
102+
Mode_5S2 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
103+
Mode_6S2 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
104+
Mode_7S2 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
105+
Mode_8S2 = US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT,
106+
};
110107

111-
USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer );
108+
USARTClass(Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer);
112109

113-
void begin( const uint32_t dwBaudRate , const USARTModes config );
114-
using UARTClass::begin; // Needed only for polymorphic methods
110+
void begin(const uint32_t dwBaudRate);
111+
void begin(const uint32_t dwBaudRate, const USARTModes config);
112+
void begin(const uint32_t dwBaudRate, const UARTModes config);
113+
114+
protected:
115+
Usart* _pUsart;
115116
};
116117

117118
#endif // _USART_CLASS_

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