@@ -577,6 +577,7 @@ fn reg_to_gcc(reg: InlineAsmRegOrRegClass) -> ConstraintOrRegister {
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| InlineAsmRegClass :: Arm ( ArmInlineAsmRegClass :: qreg_low4) => unimplemented ! ( ) ,
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InlineAsmRegClass :: Arm ( ArmInlineAsmRegClass :: dreg)
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| InlineAsmRegClass :: Arm ( ArmInlineAsmRegClass :: qreg) => unimplemented ! ( ) ,
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+ InlineAsmRegClass :: Avr ( _) => unimplemented ! ( ) ,
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InlineAsmRegClass :: Bpf ( _) => unimplemented ! ( ) ,
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InlineAsmRegClass :: Hexagon ( HexagonInlineAsmRegClass :: reg) => unimplemented ! ( ) ,
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InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) => unimplemented ! ( ) ,
@@ -639,6 +640,7 @@ fn dummy_output_type<'gcc, 'tcx>(cx: &CodegenCx<'gcc, 'tcx>, reg: InlineAsmRegCl
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| InlineAsmRegClass :: Arm ( ArmInlineAsmRegClass :: qreg_low4) => {
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unimplemented ! ( )
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}
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+ InlineAsmRegClass :: Avr ( _) => unimplemented ! ( ) ,
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InlineAsmRegClass :: Bpf ( _) => unimplemented ! ( ) ,
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InlineAsmRegClass :: Hexagon ( HexagonInlineAsmRegClass :: reg) => cx. type_i32 ( ) ,
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InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) => cx. type_i32 ( ) ,
@@ -747,6 +749,7 @@ fn modifier_to_gcc(arch: InlineAsmArch, reg: InlineAsmRegClass, modifier: Option
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| InlineAsmRegClass :: Arm ( ArmInlineAsmRegClass :: qreg_low4) => {
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unimplemented ! ( )
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}
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+ InlineAsmRegClass :: Avr ( _) => unimplemented ! ( ) ,
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InlineAsmRegClass :: Bpf ( _) => unimplemented ! ( ) ,
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InlineAsmRegClass :: Hexagon ( _) => unimplemented ! ( ) ,
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InlineAsmRegClass :: Mips ( _) => unimplemented ! ( ) ,
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