Added RISCV target support to LLVM 9+

Fixes rust-lang#191

Author: TheDan64

Cargo.toml

@@ -42,6 +42,7 @@ target-sparc = []
 target-bpf = []
 target-lanai = []
 target-webassembly = []
+target-riscv = []
 target-all = [
     "target-x86",
     "target-arm",
@@ -57,7 +58,8 @@ target-all = [
     "target-sparc",
     "target-bpf",
     "target-lanai",
-    "target-webassembly"
+    "target-webassembly",
+    "target-riscv"
 ]
 experimental = ["static-alloc"]
 

src/targets.rs

@@ -743,14 +743,13 @@ impl Target {
         }
     }
 
-    // REVIEW: As it turns out; RISCV was accidentally built by default in 4.0 since
-    // it was meant to be marked experimental and so it was later removed from default
-    // builds in 5.0+. Since llvm-sys doesn't officially support any experimental targets
-    // we're going to make this 4.0 only for now so that it doesn't break test builds.
-    // We can revisit this issue if someone wants RISCV support in inkwell, or if
-    // llvm-sys starts supporting experimental llvm targets. See
-    // https://lists.llvm.org/pipermail/llvm-dev/2017-August/116347.html for more info
-    #[llvm_versions(4.0)]
+    // RISCV was accidentally built by default in 4.0 since it was meant to be marked
+    // experimental and so it was later removed from default builds in 5.0 until it was
+    // officially released in 9.0 Since llvm-sys doesn't officially support any experimental
+    // targets we're going to make this 9.0+ only. See
+    // https://lists.llvm.org/pipermail/llvm-dev/2017-August/116347.html for more info.
+    #[cfg(feature = "target-riscv")]
+    #[llvm_versions(9.0..=latest)]
     pub fn initialize_riscv(config: &InitializationConfig) {
         use llvm_sys::target::{
             LLVMInitializeRISCVTarget, LLVMInitializeRISCVTargetInfo, LLVMInitializeRISCVTargetMC,