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lines changedSubmodule llvm-project updated 35 files
- libc/config/linux/aarch64/entrypoints.txt+8-2
- llvm/lib/Target/PowerPC/PPCRegisterInfo.td+27-8
- llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll-4
- llvm/test/CodeGen/PowerPC/aix32-p8-scalar_vector_conversions.ll-2
- llvm/test/CodeGen/PowerPC/build-vector-tests.ll-96
- llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-pwr9-64bit.ll-1
- llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll-6
- llvm/test/CodeGen/PowerPC/combine-fneg.ll-1
- llvm/test/CodeGen/PowerPC/constant-pool.ll-8
- llvm/test/CodeGen/PowerPC/elf64-byval-cc.ll+1-4
- llvm/test/CodeGen/PowerPC/fma-combine.ll-2
- llvm/test/CodeGen/PowerPC/fp-strict-round.ll-8
- llvm/test/CodeGen/PowerPC/frem.ll-5
- llvm/test/CodeGen/PowerPC/handle-f16-storage-type.ll+3-10
- llvm/test/CodeGen/PowerPC/ldexp.ll-4
- llvm/test/CodeGen/PowerPC/p10-splatImm-CPload-pcrel.ll-12
- llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll-6
- llvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll-1
- llvm/test/CodeGen/PowerPC/save-reg-params.ll-2
- llvm/test/CodeGen/PowerPC/select_const.ll-2
- llvm/test/CodeGen/PowerPC/subreg-coalescer.mir-1
- llvm/test/CodeGen/PowerPC/subreg-lanemasks.mir+10-13
- llvm/test/CodeGen/PowerPC/toc-float.ll-2
- llvm/test/CodeGen/PowerPC/variable_elem_vec_extracts.ll-3
- llvm/test/CodeGen/PowerPC/vec_insert_elt.ll-4
- llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll+6-326
- llvm/test/CodeGen/PowerPC/vector-llrint.ll+7-21
- llvm/test/CodeGen/PowerPC/vector-lrint.ll+7-21
- llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll-40
- llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll-20
- llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll-20
- llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll-16
- llvm/test/CodeGen/PowerPC/vsx.ll-3
- mlir/include/mlir/Dialect/Ptr/IR/CMakeLists.txt+1-1
- offload/test/offloading/bug51781.c-1
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