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deanm1278ladyada
deanm1278
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ladyada
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add grand central m4 (arduino#67)
* DM: grandcentral variant * DM: updates for m4 mega * DM: metro mega updates * DM: fixes for mega m4 pcc * DM: fix grandcentral boards.txt naming * DM: remove openocd for samd51, fix include guards * DM: remove unnecessary debug scripts for m4 boards
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‎boards.txt

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -308,6 +308,40 @@ adafruit_metro_m4.menu.cache.on.build.cache_flags=-DENABLE_CACHE
308308
adafruit_metro_m4.menu.cache.off=Disabled
309309
adafruit_metro_m4.menu.cache.off.build.cache_flags=
310310

311+
# Adafruit Grand Central M4 (SAMD51)
312+
# ------------------------------
313+
adafruit_grandcentral_m4.name=Adafruit Grand Central M4 (SAMD51)
314+
adafruit_grandcentral_m4.vid.0=0x239A
315+
adafruit_grandcentral_m4.pid.0=0x8020
316+
adafruit_grandcentral_m4.vid.1=0x239A
317+
adafruit_grandcentral_m4.pid.1=0x0020
318+
adafruit_grandcentral_m4.upload.tool=bossac18
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adafruit_grandcentral_m4.upload.protocol=sam-ba
320+
adafruit_grandcentral_m4.upload.maximum_size=1032192
321+
adafruit_grandcentral_m4.upload.offset=0x4000
322+
adafruit_grandcentral_m4.upload.use_1200bps_touch=true
323+
adafruit_grandcentral_m4.upload.wait_for_upload_port=true
324+
adafruit_grandcentral_m4.upload.native_usb=true
325+
adafruit_grandcentral_m4.build.mcu=cortex-m4
326+
adafruit_grandcentral_m4.build.f_cpu=120000000L
327+
adafruit_grandcentral_m4.build.usb_product="Adafruit Grand Central M4"
328+
adafruit_grandcentral_m4.build.usb_manufacturer="Adafruit LLC"
329+
adafruit_grandcentral_m4.build.board=GRAND_CENTRAL_M4
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adafruit_grandcentral_m4.build.core=arduino
331+
adafruit_grandcentral_m4.build.extra_flags=-D__SAMD51P20A__ -DADAFRUIT_GRAND_CENTRAL_M4 -D__SAMD51__ {build.usb_flags} -D__FPU_PRESENT -DARM_MATH_CM4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
332+
adafruit_grandcentral_m4.build.ldscript=linker_scripts/gcc/flash_with_bootloader.ld
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adafruit_grandcentral_m4.build.openocdscript=openocd_scripts/arduino_zero.cfg
334+
adafruit_grandcentral_m4.build.variant=grand_central_m4
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adafruit_grandcentral_m4.build.variant_system_lib=
336+
adafruit_grandcentral_m4.build.vid=0x239A
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adafruit_grandcentral_m4.build.pid=0x8020
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adafruit_grandcentral_m4.bootloader.tool=openocd
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adafruit_grandcentral_m4.bootloader.file=grand_central_m4/bootloader-grandcentralM4-v2.0.0-adafruit.5.bin
340+
adafruit_grandcentral_m4.compiler.arm.cmsis.ldflags="-L{build.variant.path}" -larm_cortexM4lf_math -mfloat-abi=hard -mfpu=fpv4-sp-d16
341+
adafruit_grandcentral_m4.menu.cache.on=Enabled
342+
adafruit_grandcentral_m4.menu.cache.on.build.cache_flags=-DENABLE_CACHE
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adafruit_grandcentral_m4.menu.cache.off=Disabled
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adafruit_grandcentral_m4.menu.cache.off.build.cache_flags=
311345

312346

313347
# Adafruit ItsyBitsy M4 (SAMD51)

‎cores/arduino/SERCOM.cpp

Lines changed: 45 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -797,6 +797,51 @@ void SERCOM::initClockNVIC( void )
797797
NVIC_EnableIRQ(SERCOM5_2_IRQn);
798798
NVIC_EnableIRQ(SERCOM5_3_IRQn);
799799
}
800+
#if defined SERCOM6
801+
else if(sercom == SERCOM6)
802+
{
803+
clk_core = SERCOM6_GCLK_ID_CORE;
804+
clk_slow = SERCOM6_GCLK_ID_SLOW;
805+
806+
NVIC_ClearPendingIRQ(SERCOM6_0_IRQn);
807+
NVIC_ClearPendingIRQ(SERCOM6_1_IRQn);
808+
NVIC_ClearPendingIRQ(SERCOM6_2_IRQn);
809+
NVIC_ClearPendingIRQ(SERCOM6_3_IRQn);
810+
811+
NVIC_SetPriority (SERCOM6_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
812+
NVIC_SetPriority (SERCOM6_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
813+
NVIC_SetPriority (SERCOM6_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
814+
NVIC_SetPriority (SERCOM6_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
815+
816+
NVIC_EnableIRQ(SERCOM6_0_IRQn);
817+
NVIC_EnableIRQ(SERCOM6_1_IRQn);
818+
NVIC_EnableIRQ(SERCOM6_2_IRQn);
819+
NVIC_EnableIRQ(SERCOM6_3_IRQn);
820+
}
821+
#endif
822+
823+
#if defined SERCOM7
824+
else if(sercom == SERCOM7)
825+
{
826+
clk_core = SERCOM7_GCLK_ID_CORE;
827+
clk_slow = SERCOM7_GCLK_ID_SLOW;
828+
829+
NVIC_ClearPendingIRQ(SERCOM7_0_IRQn);
830+
NVIC_ClearPendingIRQ(SERCOM7_1_IRQn);
831+
NVIC_ClearPendingIRQ(SERCOM7_2_IRQn);
832+
NVIC_ClearPendingIRQ(SERCOM7_3_IRQn);
833+
834+
NVIC_SetPriority (SERCOM7_0_IRQn, (1<<__NVIC_PRIO_BITS) - 1); /* set Priority */
835+
NVIC_SetPriority (SERCOM7_1_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
836+
NVIC_SetPriority (SERCOM7_2_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
837+
NVIC_SetPriority (SERCOM7_3_IRQn, (1<<__NVIC_PRIO_BITS) - 1);
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839+
NVIC_EnableIRQ(SERCOM7_0_IRQn);
840+
NVIC_EnableIRQ(SERCOM7_1_IRQn);
841+
NVIC_EnableIRQ(SERCOM7_2_IRQn);
842+
NVIC_EnableIRQ(SERCOM7_3_IRQn);
843+
}
844+
#endif
800845
#else
801846

802847
IRQn_Type IdNvic=PendSV_IRQn ; // Dummy init to intercept potential error later

‎cores/arduino/WVariant.h

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -126,6 +126,44 @@ typedef enum _ETCChannel
126126

127127
#elif defined(__SAMD51P19A__) || defined(__SAMD51P20A__)
128128

129+
typedef enum _ETCChannel
130+
{
131+
NOT_ON_TIMER=-1,
132+
TCC0_CH0 = (0<<8)|(0),
133+
TCC0_CH1 = (0<<8)|(1),
134+
TCC0_CH2 = (0<<8)|(2),
135+
TCC0_CH3 = (0<<8)|(3),
136+
TCC0_CH4 = (0<<8)|(4),
137+
TCC0_CH5 = (0<<8)|(5),
138+
TCC1_CH0 = (1<<8)|(0),
139+
TCC1_CH1 = (1<<8)|(1),
140+
TCC1_CH2 = (1<<8)|(2),
141+
TCC1_CH3 = (1<<8)|(3),
142+
TCC2_CH0 = (2<<8)|(0),
143+
TCC2_CH1 = (2<<8)|(1),
144+
TCC2_CH2 = (2<<8)|(2),
145+
TCC3_CH0 = (3<<8)|(0),
146+
TCC3_CH1 = (3<<8)|(1),
147+
TCC4_CH0 = (4<<8)|(0),
148+
TCC4_CH1 = (4<<8)|(1),
149+
TC0_CH0 = (5<<8)|(0),
150+
TC0_CH1 = (5<<8)|(1),
151+
TC1_CH0 = (6<<8)|(0),
152+
TC1_CH1 = (6<<8)|(1),
153+
TC2_CH0 = (7<<8)|(0),
154+
TC2_CH1 = (7<<8)|(1),
155+
TC3_CH0 = (8<<8)|(0),
156+
TC3_CH1 = (8<<8)|(1),
157+
TC4_CH0 = (9<<8)|(0),
158+
TC4_CH1 = (9<<8)|(1),
159+
TC5_CH0 = (10<<8)|(0),
160+
TC5_CH1 = (10<<8)|(1),
161+
TC6_CH0 = (11<<8)|(0),
162+
TC6_CH1 = (11<<8)|(1),
163+
TC7_CH0 = (12<<8)|(0),
164+
TC7_CH1 = (12<<8)|(1),
165+
} ETCChannel ;
166+
129167
#endif
130168

131169
typedef ETCChannel EPWMChannel;
@@ -210,6 +248,7 @@ typedef enum _EPortType
210248
PORTA=0,
211249
PORTB=1,
212250
PORTC=2,
251+
PORTD=3,
213252
} EPortType ;
214253

215254
#define PIN_NOT_A_PIN (UINT_MAX)

‎cores/arduino/startup.c

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -37,7 +37,7 @@
3737
//USE DPLL0 for 120MHZ
3838
#define MAIN_CLOCK_SOURCE GCLK_GENCTRL_SRC_DPLL0
3939

40-
#define GENERIC_CLOCK_GENERATOR_1M (5u)
40+
#define GENERIC_CLOCK_GENERATOR_1M (7u)
4141
//#define CRYSTALLESS
4242

4343
#else
@@ -158,7 +158,7 @@ void SystemInit( void )
158158
*/
159159

160160
//PLL0 is 120MHz
161-
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL0].reg = (1 << GCLK_PCHCTRL_CHEN_Pos) | GCLK_PCHCTRL_GEN(GCLK_PCHCTRL_GEN_GCLK5_Val);
161+
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL0].reg = (1 << GCLK_PCHCTRL_CHEN_Pos) | GCLK_PCHCTRL_GEN(GCLK_PCHCTRL_GEN_GCLK7_Val);
162162

163163
OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x00) | OSCCTRL_DPLLRATIO_LDR(59); //120 Mhz
164164

@@ -172,7 +172,7 @@ void SystemInit( void )
172172
while( OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY == 0 || OSCCTRL->Dpll[0].DPLLSTATUS.bit.LOCK == 0 );
173173

174174
//PLL1 is 100MHz
175-
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL1].reg = (1 << GCLK_PCHCTRL_CHEN_Pos) | GCLK_PCHCTRL_GEN(GCLK_PCHCTRL_GEN_GCLK5_Val);
175+
GCLK->PCHCTRL[OSCCTRL_GCLK_ID_FDPLL1].reg = (1 << GCLK_PCHCTRL_CHEN_Pos) | GCLK_PCHCTRL_GEN(GCLK_PCHCTRL_GEN_GCLK7_Val);
176176

177177
OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x00) | OSCCTRL_DPLLRATIO_LDR(49); //100 Mhz
178178

‎cores/arduino/wiring.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,9 @@ void init( void )
8585

8686
MCLK->APBCMASK.reg |= MCLK_APBCMASK_TCC2 | MCLK_APBCMASK_TCC3 | MCLK_APBCMASK_TC4 | MCLK_APBCMASK_TC5;
8787

88-
MCLK->APBDMASK.reg |= MCLK_APBDMASK_DAC | MCLK_APBDMASK_SERCOM4 | MCLK_APBDMASK_SERCOM5 | MCLK_APBDMASK_ADC0 | MCLK_APBDMASK_ADC1 | MCLK_APBDMASK_TCC4;
88+
MCLK->APBDMASK.reg |= MCLK_APBDMASK_DAC | MCLK_APBDMASK_SERCOM4 | MCLK_APBDMASK_SERCOM5 | MCLK_APBDMASK_ADC0 | MCLK_APBDMASK_ADC1 | MCLK_APBDMASK_TCC4
89+
| MCLK_APBDMASK_TC6 | MCLK_APBDMASK_TC7 | MCLK_APBDMASK_SERCOM6 | MCLK_APBDMASK_SERCOM7;
90+
8991
#else
9092
// Clock SERCOM for Serial
9193
PM->APBCMASK.reg |= PM_APBCMASK_SERCOM0 | PM_APBCMASK_SERCOM1 | PM_APBCMASK_SERCOM2 | PM_APBCMASK_SERCOM3 | PM_APBCMASK_SERCOM4 | PM_APBCMASK_SERCOM5 ;

‎cores/arduino/wiring_private.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -107,15 +107,15 @@ int pinPeripheral( uint32_t ulPin, EPioType ulPeripheral )
107107
// Set new muxing
108108
PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg = temp|PORT_PMUX_PMUXO( ulPeripheral ) ;
109109
// Enable port mux
110-
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN ;
110+
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN | PORT_PINCFG_DRVSTR;
111111
}
112112
else // even pin
113113
{
114114
uint32_t temp ;
115115

116116
temp = (PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg) & PORT_PMUX_PMUXO( 0xF ) ;
117117
PORT->Group[g_APinDescription[ulPin].ulPort].PMUX[g_APinDescription[ulPin].ulPin >> 1].reg = temp|PORT_PMUX_PMUXE( ulPeripheral ) ;
118-
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN ; // Enable port mux
118+
PORT->Group[g_APinDescription[ulPin].ulPort].PINCFG[g_APinDescription[ulPin].ulPin].reg |= PORT_PINCFG_PMUXEN | PORT_PINCFG_DRVSTR ; // Enable port mux
119119
}
120120
#endif
121121
break ;

‎variants/feather_m4/debug_scripts/variant.gdb

Lines changed: 0 additions & 31 deletions
This file was deleted.

‎variants/feather_m4/openocd_scripts/arduino_zero.cfg

Lines changed: 0 additions & 30 deletions
This file was deleted.

‎variants/grand_central_m4/libarm_cortexM4lf_math.a

2.64 MB
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