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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=sse2 | FileCheck %s |
| 3 | +; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=avx2 | FileCheck %s |
| 4 | + |
| 5 | +; infinite loop if we add the erased instructions to the work list in the wrong order. |
| 6 | +define void @multiple_extract(ptr %p) { |
| 7 | +; CHECK-LABEL: @multiple_extract( |
| 8 | +; CHECK-NEXT: [[VP:%.*]] = load ptr, ptr [[P:%.*]], align 8 |
| 9 | +; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds <2 x i32>, ptr [[VP]], i32 0, i64 0 |
| 10 | +; CHECK-NEXT: [[E0:%.*]] = load i32, ptr [[TMP1]], align 16 |
| 11 | +; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds <2 x i32>, ptr [[VP]], i32 0, i64 1 |
| 12 | +; CHECK-NEXT: [[E1:%.*]] = load i32, ptr [[TMP2]], align 4 |
| 13 | +; CHECK-NEXT: store i32 [[E0]], ptr [[P]], align 4 |
| 14 | +; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds nuw i8, ptr [[P]], i64 4 |
| 15 | +; CHECK-NEXT: store i32 [[E1]], ptr [[P1]], align 4 |
| 16 | +; CHECK-NEXT: ret void |
| 17 | +; |
| 18 | + %vp = load ptr, ptr %p, align 8 |
| 19 | + %v = load <2 x i32>, ptr %vp, align 16 |
| 20 | + %e0 = extractelement <2 x i32> %v, i64 0 |
| 21 | + %e1 = extractelement <2 x i32> %v, i64 1 |
| 22 | + store i32 %e0, ptr %p, align 4 |
| 23 | + %p1 = getelementptr inbounds nuw i8, ptr %p, i64 4 |
| 24 | + store i32 %e1, ptr %p1, align 4 |
| 25 | + ret void |
| 26 | +} |
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