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Turn on EnableUniformSimd1Stores pass for CS
Turn on EnableUniformSimd1Stores to use SIMD1 for uniform SLM Stores
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4 files changed

+9
-1
lines changed

4 files changed

+9
-1
lines changed

IGC/Compiler/CISACodeGen/DriverInfo.hpp

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@@ -383,6 +383,7 @@ namespace IGC
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virtual bool supportLscSamplerRouting() const { return true; }
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virtual bool supportBarrierControlFlowOptimization() const { return false; }
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virtual bool getLscStoresWithNonDefaultL1CacheControls() const { return true; }
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virtual bool supportMergeUniformSimd1Stores() const { return true; }
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// Informs if the UMD understands atomic pull tile walk for raytracing
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virtual bool supportsAtomicPullSWTileWalk() const { return false; }

IGC/Compiler/CISACodeGen/Platform.hpp

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@@ -1930,5 +1930,10 @@ bool allowsMoviForType(VISA_Type type) const {
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return (type == ISA_TYPE_UD || type == ISA_TYPE_D);
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}
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bool supportMergeUniformSimd1Stores() const
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{
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return isCoreChildOf(IGFX_XE2_HPG_CORE);
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}
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};
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}//namespace IGC

IGC/Compiler/CISACodeGen/ShaderCodeGen.cpp

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@@ -1919,6 +1919,8 @@ void OptimizeIR(CodeGenContext* const pContext)
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}
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if (pContext->type == ShaderType::COMPUTE_SHADER &&
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pContext->m_DriverInfo.supportMergeUniformSimd1Stores() &&
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pContext->platform.supportMergeUniformSimd1Stores() &&
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IGC_IS_FLAG_ENABLED(EnableUniformSimd1Stores))
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{
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mpm.add(new MergeUniformStores());

IGC/common/igc_flags.h

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@@ -341,7 +341,7 @@ DECLARE_IGC_REGKEY(DWORD, FPRoundingModeCoalescingMaxDistance, 20, "Max distance
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DECLARE_IGC_REGKEY(bool, DisableDotAddToDp4aMerge, false, "Disable Dot and Add ops to Dp4a merge optimization.", false)
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DECLARE_IGC_REGKEY(bool, DisableLoopSplitWidePHIs, false, "Disable splitting of loop PHI values to eliminate subvector extract operations", false)
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DECLARE_IGC_REGKEY(bool, EnableBarrierControlFlowOptimizationPass, false, "Enable barrier control flow optimization pass", false)
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DECLARE_IGC_REGKEY(bool, EnableUniformSimd1Stores, false, "Collapse SIMD32 uniform stores into SIMD1 to reduce pressure", true)
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DECLARE_IGC_REGKEY(bool, EnableUniformSimd1Stores, true, "Collapse SIMD32 uniform stores into SIMD1 to reduce pressure", true)
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DECLARE_IGC_REGKEY(bool, EnableWaveShuffleIndexSinking, true, "Hoist identical instructions operating on WaveShuffleIndex instructions with the same source and a constant lane/channel", false)
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DECLARE_IGC_REGKEY(DWORD, WaveShuffleIndexSinkingMaxIterations, 3, "Max number of iterations to run iterative WaveShuffleIndexSinking", false)
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DECLARE_IGC_REGKEY(bool, EnableWaveAllJointReduction, false, "Enable Joint Reduction Optimization.", false)

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