@@ -105,3 +105,33 @@ body: |
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%3:vr = COPY %0
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...
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---
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+ name : diff_regclass
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+ body : |
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+ bb.0.entry:
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+ liveins: $v8
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+ ; CHECK-LABEL: name: diff_regclass
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+ ; CHECK: liveins: $v8
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+ ; CHECK-NEXT: {{ $}}
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+ ; CHECK-NEXT: [[PseudoVMV_V_I_MF2_:%[0-9]+]]:vrnov0 = PseudoVMV_V_I_MF2 $noreg, 0, 0, 5 /* e32 */, 1 /* ta, mu */
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+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:vmv0 = COPY $v8
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+ ; CHECK-NEXT: [[PseudoVADD_VV_M1_MASK:%[0-9]+]]:vrnov0 = PseudoVADD_VV_M1_MASK [[PseudoVMV_V_I_MF2_]], $noreg, $noreg, [[COPY]], 0, 5 /* e32 */, 0 /* tu, mu */
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+ %0:vr = PseudoVMV_V_I_MF2 $noreg, 0, -1, 5 /* e32 */, 0 /* tu, mu */
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+ %1:vrnov0 = PseudoVMV_V_V_MF2 $noreg, %0, 0, 5 /* e32 */, 0 /* tu, mu */
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+ %2:vmv0 = COPY $v8
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+ %3:vrnov0 = PseudoVADD_VV_M1_MASK %1, $noreg, $noreg, %2, 0, 5 /* e32 */, 0 /* tu, mu */
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+ ...
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+ ---
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+ name : diff_regclass_passthru
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+ body : |
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+ bb.0.entry:
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+ liveins: $v8
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+ ; CHECK-LABEL: name: diff_regclass_passthru
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+ ; CHECK: liveins: $v8
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+ ; CHECK-NEXT: {{ $}}
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+ ; CHECK-NEXT: [[PseudoVMV_V_I_MF2_:%[0-9]+]]:vrnov0 = PseudoVMV_V_I_MF2 $noreg, 0, 0, 5 /* e32 */, 1 /* ta, mu */
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+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:vmv0 = COPY $v8
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+ ; CHECK-NEXT: [[PseudoVLSE32_V_MF2_MASK:%[0-9]+]]:vrnov0 = PseudoVLSE32_V_MF2_MASK [[PseudoVMV_V_I_MF2_]], $noreg, $noreg, [[COPY]], 0, 5 /* e32 */, 0 /* tu, mu */ :: (load unknown-size, align 4)
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+ %2:vr = PseudoVMV_V_I_MF2 $noreg, 0, -1, 5 /* e32 */, 0 /* tu, mu */
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+ %3:vrnov0 = PseudoVMV_V_V_MF2 $noreg, %2, 0, 5 /* e32 */, 0 /* tu, mu */
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+ %7:vmv0 = COPY $v8
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+ %6:vrnov0 = PseudoVLSE32_V_MF2_MASK %3, $noreg, $noreg, %7, 0, 5 /* e32 */, 0 /* tu, mu */ :: (load unknown-size, align 4)
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