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[LLD][AArch64] Simplify relocations sharing same encoding [NFC]
The code to encode the result in relocateOne for the relocations: R_AARCH64_LD64_GOT_LO12_NC R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC R_AARCH64_TLSDESC_LD64_LO12 is equivalent to that for R_AARCH64_LDST64_ABS_LO12_NC. This is described in the ABI as "Set the LD/ST immediate field bits [11:3] of X. No overflow check; check that X&7 =0. Differential Revision: https://reviews.llvm.org/D46247 git-svn-id: https://llvm.org/svn/llvm-project/lld/trunk@331452 91177308-0d34-0410-b5e6-96231b3b80d8
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ELF/Arch/AArch64.cpp

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -289,12 +289,6 @@ void AArch64::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
289289
checkInt(Loc, Val, 21, Type);
290290
or32le(Loc, (Val & 0x1FFFFC) << 3);
291291
break;
292-
case R_AARCH64_LD64_GOT_LO12_NC:
293-
case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
294-
case R_AARCH64_TLSDESC_LD64_LO12:
295-
checkAlignment(Loc, Val, 8, Type);
296-
or32le(Loc, (Val & 0xFF8) << 7);
297-
break;
298292
case R_AARCH64_LDST8_ABS_LO12_NC:
299293
or32AArch64Imm(Loc, getBits(Val, 0, 11));
300294
break;
@@ -307,6 +301,9 @@ void AArch64::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
307301
or32AArch64Imm(Loc, getBits(Val, 2, 11));
308302
break;
309303
case R_AARCH64_LDST64_ABS_LO12_NC:
304+
case R_AARCH64_LD64_GOT_LO12_NC:
305+
case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
306+
case R_AARCH64_TLSDESC_LD64_LO12:
310307
checkAlignment(Loc, Val, 8, Type);
311308
or32AArch64Imm(Loc, getBits(Val, 3, 11));
312309
break;

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