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[AVX-512] Add avx512vl command line to the fpext test and add -show-mc-encoding to show where we aren't using EVEX instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@286058 91177308-0d34-0410-b5e6-96231b3b80d8
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‎test/CodeGen/X86/vec_fpext.ll

Lines changed: 146 additions & 80 deletions
Original file line numberDiff line numberDiff line change
@@ -1,38 +1,54 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32-SSE
3-
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X32-AVX
4-
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64-SSE
5-
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
2+
; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefix=X32-SSE
3+
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=X32-AVX
4+
; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=X32-AVX512VL
5+
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefix=X64-SSE
6+
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=X64-AVX
7+
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=X64-AVX512VL
68

79
; PR11674
810
define void @fpext_frommem(<2 x float>* %in, <2 x double>* %out) {
911
; X32-SSE-LABEL: fpext_frommem:
1012
; X32-SSE: # BB#0: # %entry
11-
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
12-
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
13-
; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0
14-
; X32-SSE-NEXT: movups %xmm0, (%eax)
15-
; X32-SSE-NEXT: retl
13+
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
14+
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
15+
; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0 # encoding: [0x0f,0x5a,0x01]
16+
; X32-SSE-NEXT: movups %xmm0, (%eax) # encoding: [0x0f,0x11,0x00]
17+
; X32-SSE-NEXT: retl # encoding: [0xc3]
1618
;
1719
; X32-AVX-LABEL: fpext_frommem:
1820
; X32-AVX: # BB#0: # %entry
19-
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
20-
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
21-
; X32-AVX-NEXT: vcvtps2pd (%ecx), %xmm0
22-
; X32-AVX-NEXT: vmovups %xmm0, (%eax)
23-
; X32-AVX-NEXT: retl
21+
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
22+
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
23+
; X32-AVX-NEXT: vcvtps2pd (%ecx), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x01]
24+
; X32-AVX-NEXT: vmovups %xmm0, (%eax) # encoding: [0xc5,0xf8,0x11,0x00]
25+
; X32-AVX-NEXT: retl # encoding: [0xc3]
26+
;
27+
; X32-AVX512VL-LABEL: fpext_frommem:
28+
; X32-AVX512VL: # BB#0: # %entry
29+
; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
30+
; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
31+
; X32-AVX512VL-NEXT: vcvtps2pd (%ecx), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x01]
32+
; X32-AVX512VL-NEXT: vmovups %xmm0, (%eax) # encoding: [0x62,0xf1,0x7c,0x08,0x11,0x00]
33+
; X32-AVX512VL-NEXT: retl # encoding: [0xc3]
2434
;
2535
; X64-SSE-LABEL: fpext_frommem:
2636
; X64-SSE: # BB#0: # %entry
27-
; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0
28-
; X64-SSE-NEXT: movups %xmm0, (%rsi)
29-
; X64-SSE-NEXT: retq
37+
; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # encoding: [0x0f,0x5a,0x07]
38+
; X64-SSE-NEXT: movups %xmm0, (%rsi) # encoding: [0x0f,0x11,0x06]
39+
; X64-SSE-NEXT: retq # encoding: [0xc3]
3040
;
3141
; X64-AVX-LABEL: fpext_frommem:
3242
; X64-AVX: # BB#0: # %entry
33-
; X64-AVX-NEXT: vcvtps2pd (%rdi), %xmm0
34-
; X64-AVX-NEXT: vmovups %xmm0, (%rsi)
35-
; X64-AVX-NEXT: retq
43+
; X64-AVX-NEXT: vcvtps2pd (%rdi), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x07]
44+
; X64-AVX-NEXT: vmovups %xmm0, (%rsi) # encoding: [0xc5,0xf8,0x11,0x06]
45+
; X64-AVX-NEXT: retq # encoding: [0xc3]
46+
;
47+
; X64-AVX512VL-LABEL: fpext_frommem:
48+
; X64-AVX512VL: # BB#0: # %entry
49+
; X64-AVX512VL-NEXT: vcvtps2pd (%rdi), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x07]
50+
; X64-AVX512VL-NEXT: vmovups %xmm0, (%rsi) # encoding: [0x62,0xf1,0x7c,0x08,0x11,0x06]
51+
; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
3652
entry:
3753
%0 = load <2 x float>, <2 x float>* %in, align 8
3854
%1 = fpext <2 x float> %0 to <2 x double>
@@ -43,37 +59,51 @@ entry:
4359
define void @fpext_frommem4(<4 x float>* %in, <4 x double>* %out) {
4460
; X32-SSE-LABEL: fpext_frommem4:
4561
; X32-SSE: # BB#0: # %entry
46-
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
47-
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
48-
; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0
49-
; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1
50-
; X32-SSE-NEXT: movups %xmm1, 16(%eax)
51-
; X32-SSE-NEXT: movups %xmm0, (%eax)
52-
; X32-SSE-NEXT: retl
62+
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
63+
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
64+
; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0 # encoding: [0x0f,0x5a,0x01]
65+
; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1 # encoding: [0x0f,0x5a,0x49,0x08]
66+
; X32-SSE-NEXT: movups %xmm1, 16(%eax) # encoding: [0x0f,0x11,0x48,0x10]
67+
; X32-SSE-NEXT: movups %xmm0, (%eax) # encoding: [0x0f,0x11,0x00]
68+
; X32-SSE-NEXT: retl # encoding: [0xc3]
5369
;
5470
; X32-AVX-LABEL: fpext_frommem4:
5571
; X32-AVX: # BB#0: # %entry
56-
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
57-
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
58-
; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0
59-
; X32-AVX-NEXT: vmovups %ymm0, (%eax)
60-
; X32-AVX-NEXT: vzeroupper
61-
; X32-AVX-NEXT: retl
72+
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
73+
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
74+
; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x01]
75+
; X32-AVX-NEXT: vmovups %ymm0, (%eax) # encoding: [0xc5,0xfc,0x11,0x00]
76+
; X32-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
77+
; X32-AVX-NEXT: retl # encoding: [0xc3]
78+
;
79+
; X32-AVX512VL-LABEL: fpext_frommem4:
80+
; X32-AVX512VL: # BB#0: # %entry
81+
; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
82+
; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
83+
; X32-AVX512VL-NEXT: vcvtps2pd (%ecx), %ymm0 # encoding: [0x62,0xf1,0x7c,0x28,0x5a,0x01]
84+
; X32-AVX512VL-NEXT: vmovups %ymm0, (%eax) # encoding: [0x62,0xf1,0x7c,0x28,0x11,0x00]
85+
; X32-AVX512VL-NEXT: retl # encoding: [0xc3]
6286
;
6387
; X64-SSE-LABEL: fpext_frommem4:
6488
; X64-SSE: # BB#0: # %entry
65-
; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0
66-
; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1
67-
; X64-SSE-NEXT: movups %xmm1, 16(%rsi)
68-
; X64-SSE-NEXT: movups %xmm0, (%rsi)
69-
; X64-SSE-NEXT: retq
89+
; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # encoding: [0x0f,0x5a,0x07]
90+
; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1 # encoding: [0x0f,0x5a,0x4f,0x08]
91+
; X64-SSE-NEXT: movups %xmm1, 16(%rsi) # encoding: [0x0f,0x11,0x4e,0x10]
92+
; X64-SSE-NEXT: movups %xmm0, (%rsi) # encoding: [0x0f,0x11,0x06]
93+
; X64-SSE-NEXT: retq # encoding: [0xc3]
7094
;
7195
; X64-AVX-LABEL: fpext_frommem4:
7296
; X64-AVX: # BB#0: # %entry
73-
; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0
74-
; X64-AVX-NEXT: vmovups %ymm0, (%rsi)
75-
; X64-AVX-NEXT: vzeroupper
76-
; X64-AVX-NEXT: retq
97+
; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x07]
98+
; X64-AVX-NEXT: vmovups %ymm0, (%rsi) # encoding: [0xc5,0xfc,0x11,0x06]
99+
; X64-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
100+
; X64-AVX-NEXT: retq # encoding: [0xc3]
101+
;
102+
; X64-AVX512VL-LABEL: fpext_frommem4:
103+
; X64-AVX512VL: # BB#0: # %entry
104+
; X64-AVX512VL-NEXT: vcvtps2pd (%rdi), %ymm0 # encoding: [0x62,0xf1,0x7c,0x28,0x5a,0x07]
105+
; X64-AVX512VL-NEXT: vmovups %ymm0, (%rsi) # encoding: [0x62,0xf1,0x7c,0x28,0x11,0x06]
106+
; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
77107
entry:
78108
%0 = load <4 x float>, <4 x float>* %in
79109
%1 = fpext <4 x float> %0 to <4 x double>
@@ -84,49 +114,63 @@ entry:
84114
define void @fpext_frommem8(<8 x float>* %in, <8 x double>* %out) {
85115
; X32-SSE-LABEL: fpext_frommem8:
86116
; X32-SSE: # BB#0: # %entry
87-
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
88-
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
89-
; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0
90-
; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1
91-
; X32-SSE-NEXT: cvtps2pd 16(%ecx), %xmm2
92-
; X32-SSE-NEXT: cvtps2pd 24(%ecx), %xmm3
93-
; X32-SSE-NEXT: movups %xmm3, 48(%eax)
94-
; X32-SSE-NEXT: movups %xmm2, 32(%eax)
95-
; X32-SSE-NEXT: movups %xmm1, 16(%eax)
96-
; X32-SSE-NEXT: movups %xmm0, (%eax)
97-
; X32-SSE-NEXT: retl
117+
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
118+
; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
119+
; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0 # encoding: [0x0f,0x5a,0x01]
120+
; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1 # encoding: [0x0f,0x5a,0x49,0x08]
121+
; X32-SSE-NEXT: cvtps2pd 16(%ecx), %xmm2 # encoding: [0x0f,0x5a,0x51,0x10]
122+
; X32-SSE-NEXT: cvtps2pd 24(%ecx), %xmm3 # encoding: [0x0f,0x5a,0x59,0x18]
123+
; X32-SSE-NEXT: movups %xmm3, 48(%eax) # encoding: [0x0f,0x11,0x58,0x30]
124+
; X32-SSE-NEXT: movups %xmm2, 32(%eax) # encoding: [0x0f,0x11,0x50,0x20]
125+
; X32-SSE-NEXT: movups %xmm1, 16(%eax) # encoding: [0x0f,0x11,0x48,0x10]
126+
; X32-SSE-NEXT: movups %xmm0, (%eax) # encoding: [0x0f,0x11,0x00]
127+
; X32-SSE-NEXT: retl # encoding: [0xc3]
98128
;
99129
; X32-AVX-LABEL: fpext_frommem8:
100130
; X32-AVX: # BB#0: # %entry
101-
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
102-
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
103-
; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0
104-
; X32-AVX-NEXT: vcvtps2pd 16(%ecx), %ymm1
105-
; X32-AVX-NEXT: vmovups %ymm1, 32(%eax)
106-
; X32-AVX-NEXT: vmovups %ymm0, (%eax)
107-
; X32-AVX-NEXT: vzeroupper
108-
; X32-AVX-NEXT: retl
131+
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
132+
; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
133+
; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x01]
134+
; X32-AVX-NEXT: vcvtps2pd 16(%ecx), %ymm1 # encoding: [0xc5,0xfc,0x5a,0x49,0x10]
135+
; X32-AVX-NEXT: vmovups %ymm1, 32(%eax) # encoding: [0xc5,0xfc,0x11,0x48,0x20]
136+
; X32-AVX-NEXT: vmovups %ymm0, (%eax) # encoding: [0xc5,0xfc,0x11,0x00]
137+
; X32-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
138+
; X32-AVX-NEXT: retl # encoding: [0xc3]
139+
;
140+
; X32-AVX512VL-LABEL: fpext_frommem8:
141+
; X32-AVX512VL: # BB#0: # %entry
142+
; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
143+
; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
144+
; X32-AVX512VL-NEXT: vcvtps2pd (%ecx), %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x5a,0x01]
145+
; X32-AVX512VL-NEXT: vmovups %zmm0, (%eax) # encoding: [0x62,0xf1,0x7c,0x48,0x11,0x00]
146+
; X32-AVX512VL-NEXT: retl # encoding: [0xc3]
109147
;
110148
; X64-SSE-LABEL: fpext_frommem8:
111149
; X64-SSE: # BB#0: # %entry
112-
; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0
113-
; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1
114-
; X64-SSE-NEXT: cvtps2pd 16(%rdi), %xmm2
115-
; X64-SSE-NEXT: cvtps2pd 24(%rdi), %xmm3
116-
; X64-SSE-NEXT: movups %xmm3, 48(%rsi)
117-
; X64-SSE-NEXT: movups %xmm2, 32(%rsi)
118-
; X64-SSE-NEXT: movups %xmm1, 16(%rsi)
119-
; X64-SSE-NEXT: movups %xmm0, (%rsi)
120-
; X64-SSE-NEXT: retq
150+
; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # encoding: [0x0f,0x5a,0x07]
151+
; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1 # encoding: [0x0f,0x5a,0x4f,0x08]
152+
; X64-SSE-NEXT: cvtps2pd 16(%rdi), %xmm2 # encoding: [0x0f,0x5a,0x57,0x10]
153+
; X64-SSE-NEXT: cvtps2pd 24(%rdi), %xmm3 # encoding: [0x0f,0x5a,0x5f,0x18]
154+
; X64-SSE-NEXT: movups %xmm3, 48(%rsi) # encoding: [0x0f,0x11,0x5e,0x30]
155+
; X64-SSE-NEXT: movups %xmm2, 32(%rsi) # encoding: [0x0f,0x11,0x56,0x20]
156+
; X64-SSE-NEXT: movups %xmm1, 16(%rsi) # encoding: [0x0f,0x11,0x4e,0x10]
157+
; X64-SSE-NEXT: movups %xmm0, (%rsi) # encoding: [0x0f,0x11,0x06]
158+
; X64-SSE-NEXT: retq # encoding: [0xc3]
121159
;
122160
; X64-AVX-LABEL: fpext_frommem8:
123161
; X64-AVX: # BB#0: # %entry
124-
; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0
125-
; X64-AVX-NEXT: vcvtps2pd 16(%rdi), %ymm1
126-
; X64-AVX-NEXT: vmovups %ymm1, 32(%rsi)
127-
; X64-AVX-NEXT: vmovups %ymm0, (%rsi)
128-
; X64-AVX-NEXT: vzeroupper
129-
; X64-AVX-NEXT: retq
162+
; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x07]
163+
; X64-AVX-NEXT: vcvtps2pd 16(%rdi), %ymm1 # encoding: [0xc5,0xfc,0x5a,0x4f,0x10]
164+
; X64-AVX-NEXT: vmovups %ymm1, 32(%rsi) # encoding: [0xc5,0xfc,0x11,0x4e,0x20]
165+
; X64-AVX-NEXT: vmovups %ymm0, (%rsi) # encoding: [0xc5,0xfc,0x11,0x06]
166+
; X64-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
167+
; X64-AVX-NEXT: retq # encoding: [0xc3]
168+
;
169+
; X64-AVX512VL-LABEL: fpext_frommem8:
170+
; X64-AVX512VL: # BB#0: # %entry
171+
; X64-AVX512VL-NEXT: vcvtps2pd (%rdi), %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x5a,0x07]
172+
; X64-AVX512VL-NEXT: vmovups %zmm0, (%rsi) # encoding: [0x62,0xf1,0x7c,0x48,0x11,0x06]
173+
; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
130174
entry:
131175
%0 = load <8 x float>, <8 x float>* %in
132176
%1 = fpext <8 x float> %0 to <8 x double>
@@ -138,22 +182,44 @@ define <2 x double> @fpext_fromconst() {
138182
; X32-SSE-LABEL: fpext_fromconst:
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; X32-SSE: # BB#0: # %entry
140184
; X32-SSE-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
141-
; X32-SSE-NEXT: retl
185+
; X32-SSE-NEXT: # encoding: [0x0f,0x28,0x05,A,A,A,A]
186+
; X32-SSE-NEXT: # fixup A - offset: 3, value: {{\.LCPI.*}}, kind: FK_Data_4
187+
; X32-SSE-NEXT: retl # encoding: [0xc3]
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;
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; X32-AVX-LABEL: fpext_fromconst:
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; X32-AVX: # BB#0: # %entry
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; X32-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
146-
; X32-AVX-NEXT: retl
192+
; X32-AVX-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A]
193+
; X32-AVX-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}, kind: FK_Data_4
194+
; X32-AVX-NEXT: retl # encoding: [0xc3]
195+
;
196+
; X32-AVX512VL-LABEL: fpext_fromconst:
197+
; X32-AVX512VL: # BB#0: # %entry
198+
; X32-AVX512VL-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
199+
; X32-AVX512VL-NEXT: # encoding: [0x62,0xf1,0x7c,0x08,0x28,0x05,A,A,A,A]
200+
; X32-AVX512VL-NEXT: # fixup A - offset: 6, value: {{\.LCPI.*}}, kind: FK_Data_4
201+
; X32-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-SSE-LABEL: fpext_fromconst:
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; X64-SSE: # BB#0: # %entry
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; X64-SSE-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
151-
; X64-SSE-NEXT: retq
206+
; X64-SSE-NEXT: # encoding: [0x0f,0x28,0x05,A,A,A,A]
207+
; X64-SSE-NEXT: # fixup A - offset: 3, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte
208+
; X64-SSE-NEXT: retq # encoding: [0xc3]
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;
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; X64-AVX-LABEL: fpext_fromconst:
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; X64-AVX: # BB#0: # %entry
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; X64-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
156-
; X64-AVX-NEXT: retq
213+
; X64-AVX-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A]
214+
; X64-AVX-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte
215+
; X64-AVX-NEXT: retq # encoding: [0xc3]
216+
;
217+
; X64-AVX512VL-LABEL: fpext_fromconst:
218+
; X64-AVX512VL: # BB#0: # %entry
219+
; X64-AVX512VL-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
220+
; X64-AVX512VL-NEXT: # encoding: [0x62,0xf1,0x7c,0x08,0x28,0x05,A,A,A,A]
221+
; X64-AVX512VL-NEXT: # fixup A - offset: 6, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte
222+
; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
157223
entry:
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%0 = insertelement <2 x float> undef, float 1.0, i32 0
159225
%1 = insertelement <2 x float> %0, float -2.0, i32 1

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