1
1
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2
- ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32-SSE
3
- ; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X32-AVX
4
- ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64-SSE
5
- ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
2
+ ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefix=X32-SSE
3
+ ; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=X32-AVX
4
+ ; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=X32-AVX512VL
5
+ ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefix=X64-SSE
6
+ ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=X64-AVX
7
+ ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=X64-AVX512VL
6
8
7
9
; PR11674
8
10
define void @fpext_frommem (<2 x float >* %in , <2 x double >* %out ) {
9
11
; X32-SSE-LABEL: fpext_frommem:
10
12
; X32-SSE: # BB#0: # %entry
11
- ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
12
- ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
13
- ; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0
14
- ; X32-SSE-NEXT: movups %xmm0, (%eax)
15
- ; X32-SSE-NEXT: retl
13
+ ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
14
+ ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
15
+ ; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0 # encoding: [0x0f,0x5a,0x01]
16
+ ; X32-SSE-NEXT: movups %xmm0, (%eax) # encoding: [0x0f,0x11,0x00]
17
+ ; X32-SSE-NEXT: retl # encoding: [0xc3]
16
18
;
17
19
; X32-AVX-LABEL: fpext_frommem:
18
20
; X32-AVX: # BB#0: # %entry
19
- ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
20
- ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
21
- ; X32-AVX-NEXT: vcvtps2pd (%ecx), %xmm0
22
- ; X32-AVX-NEXT: vmovups %xmm0, (%eax)
23
- ; X32-AVX-NEXT: retl
21
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
22
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
23
+ ; X32-AVX-NEXT: vcvtps2pd (%ecx), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x01]
24
+ ; X32-AVX-NEXT: vmovups %xmm0, (%eax) # encoding: [0xc5,0xf8,0x11,0x00]
25
+ ; X32-AVX-NEXT: retl # encoding: [0xc3]
26
+ ;
27
+ ; X32-AVX512VL-LABEL: fpext_frommem:
28
+ ; X32-AVX512VL: # BB#0: # %entry
29
+ ; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
30
+ ; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
31
+ ; X32-AVX512VL-NEXT: vcvtps2pd (%ecx), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x01]
32
+ ; X32-AVX512VL-NEXT: vmovups %xmm0, (%eax) # encoding: [0x62,0xf1,0x7c,0x08,0x11,0x00]
33
+ ; X32-AVX512VL-NEXT: retl # encoding: [0xc3]
24
34
;
25
35
; X64-SSE-LABEL: fpext_frommem:
26
36
; X64-SSE: # BB#0: # %entry
27
- ; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0
28
- ; X64-SSE-NEXT: movups %xmm0, (%rsi)
29
- ; X64-SSE-NEXT: retq
37
+ ; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # encoding: [0x0f,0x5a,0x07]
38
+ ; X64-SSE-NEXT: movups %xmm0, (%rsi) # encoding: [0x0f,0x11,0x06]
39
+ ; X64-SSE-NEXT: retq # encoding: [0xc3]
30
40
;
31
41
; X64-AVX-LABEL: fpext_frommem:
32
42
; X64-AVX: # BB#0: # %entry
33
- ; X64-AVX-NEXT: vcvtps2pd (%rdi), %xmm0
34
- ; X64-AVX-NEXT: vmovups %xmm0, (%rsi)
35
- ; X64-AVX-NEXT: retq
43
+ ; X64-AVX-NEXT: vcvtps2pd (%rdi), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x07]
44
+ ; X64-AVX-NEXT: vmovups %xmm0, (%rsi) # encoding: [0xc5,0xf8,0x11,0x06]
45
+ ; X64-AVX-NEXT: retq # encoding: [0xc3]
46
+ ;
47
+ ; X64-AVX512VL-LABEL: fpext_frommem:
48
+ ; X64-AVX512VL: # BB#0: # %entry
49
+ ; X64-AVX512VL-NEXT: vcvtps2pd (%rdi), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x07]
50
+ ; X64-AVX512VL-NEXT: vmovups %xmm0, (%rsi) # encoding: [0x62,0xf1,0x7c,0x08,0x11,0x06]
51
+ ; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
36
52
entry:
37
53
%0 = load <2 x float >, <2 x float >* %in , align 8
38
54
%1 = fpext <2 x float > %0 to <2 x double >
@@ -43,37 +59,51 @@ entry:
43
59
define void @fpext_frommem4 (<4 x float >* %in , <4 x double >* %out ) {
44
60
; X32-SSE-LABEL: fpext_frommem4:
45
61
; X32-SSE: # BB#0: # %entry
46
- ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
47
- ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
48
- ; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0
49
- ; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1
50
- ; X32-SSE-NEXT: movups %xmm1, 16(%eax)
51
- ; X32-SSE-NEXT: movups %xmm0, (%eax)
52
- ; X32-SSE-NEXT: retl
62
+ ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
63
+ ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
64
+ ; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0 # encoding: [0x0f,0x5a,0x01]
65
+ ; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1 # encoding: [0x0f,0x5a,0x49,0x08]
66
+ ; X32-SSE-NEXT: movups %xmm1, 16(%eax) # encoding: [0x0f,0x11,0x48,0x10]
67
+ ; X32-SSE-NEXT: movups %xmm0, (%eax) # encoding: [0x0f,0x11,0x00]
68
+ ; X32-SSE-NEXT: retl # encoding: [0xc3]
53
69
;
54
70
; X32-AVX-LABEL: fpext_frommem4:
55
71
; X32-AVX: # BB#0: # %entry
56
- ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
57
- ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
58
- ; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0
59
- ; X32-AVX-NEXT: vmovups %ymm0, (%eax)
60
- ; X32-AVX-NEXT: vzeroupper
61
- ; X32-AVX-NEXT: retl
72
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
73
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
74
+ ; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x01]
75
+ ; X32-AVX-NEXT: vmovups %ymm0, (%eax) # encoding: [0xc5,0xfc,0x11,0x00]
76
+ ; X32-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
77
+ ; X32-AVX-NEXT: retl # encoding: [0xc3]
78
+ ;
79
+ ; X32-AVX512VL-LABEL: fpext_frommem4:
80
+ ; X32-AVX512VL: # BB#0: # %entry
81
+ ; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
82
+ ; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
83
+ ; X32-AVX512VL-NEXT: vcvtps2pd (%ecx), %ymm0 # encoding: [0x62,0xf1,0x7c,0x28,0x5a,0x01]
84
+ ; X32-AVX512VL-NEXT: vmovups %ymm0, (%eax) # encoding: [0x62,0xf1,0x7c,0x28,0x11,0x00]
85
+ ; X32-AVX512VL-NEXT: retl # encoding: [0xc3]
62
86
;
63
87
; X64-SSE-LABEL: fpext_frommem4:
64
88
; X64-SSE: # BB#0: # %entry
65
- ; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0
66
- ; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1
67
- ; X64-SSE-NEXT: movups %xmm1, 16(%rsi)
68
- ; X64-SSE-NEXT: movups %xmm0, (%rsi)
69
- ; X64-SSE-NEXT: retq
89
+ ; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # encoding: [0x0f,0x5a,0x07]
90
+ ; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1 # encoding: [0x0f,0x5a,0x4f,0x08]
91
+ ; X64-SSE-NEXT: movups %xmm1, 16(%rsi) # encoding: [0x0f,0x11,0x4e,0x10]
92
+ ; X64-SSE-NEXT: movups %xmm0, (%rsi) # encoding: [0x0f,0x11,0x06]
93
+ ; X64-SSE-NEXT: retq # encoding: [0xc3]
70
94
;
71
95
; X64-AVX-LABEL: fpext_frommem4:
72
96
; X64-AVX: # BB#0: # %entry
73
- ; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0
74
- ; X64-AVX-NEXT: vmovups %ymm0, (%rsi)
75
- ; X64-AVX-NEXT: vzeroupper
76
- ; X64-AVX-NEXT: retq
97
+ ; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x07]
98
+ ; X64-AVX-NEXT: vmovups %ymm0, (%rsi) # encoding: [0xc5,0xfc,0x11,0x06]
99
+ ; X64-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
100
+ ; X64-AVX-NEXT: retq # encoding: [0xc3]
101
+ ;
102
+ ; X64-AVX512VL-LABEL: fpext_frommem4:
103
+ ; X64-AVX512VL: # BB#0: # %entry
104
+ ; X64-AVX512VL-NEXT: vcvtps2pd (%rdi), %ymm0 # encoding: [0x62,0xf1,0x7c,0x28,0x5a,0x07]
105
+ ; X64-AVX512VL-NEXT: vmovups %ymm0, (%rsi) # encoding: [0x62,0xf1,0x7c,0x28,0x11,0x06]
106
+ ; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
77
107
entry:
78
108
%0 = load <4 x float >, <4 x float >* %in
79
109
%1 = fpext <4 x float > %0 to <4 x double >
@@ -84,49 +114,63 @@ entry:
84
114
define void @fpext_frommem8 (<8 x float >* %in , <8 x double >* %out ) {
85
115
; X32-SSE-LABEL: fpext_frommem8:
86
116
; X32-SSE: # BB#0: # %entry
87
- ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
88
- ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx
89
- ; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0
90
- ; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1
91
- ; X32-SSE-NEXT: cvtps2pd 16(%ecx), %xmm2
92
- ; X32-SSE-NEXT: cvtps2pd 24(%ecx), %xmm3
93
- ; X32-SSE-NEXT: movups %xmm3, 48(%eax)
94
- ; X32-SSE-NEXT: movups %xmm2, 32(%eax)
95
- ; X32-SSE-NEXT: movups %xmm1, 16(%eax)
96
- ; X32-SSE-NEXT: movups %xmm0, (%eax)
97
- ; X32-SSE-NEXT: retl
117
+ ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
118
+ ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
119
+ ; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0 # encoding: [0x0f,0x5a,0x01]
120
+ ; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1 # encoding: [0x0f,0x5a,0x49,0x08]
121
+ ; X32-SSE-NEXT: cvtps2pd 16(%ecx), %xmm2 # encoding: [0x0f,0x5a,0x51,0x10]
122
+ ; X32-SSE-NEXT: cvtps2pd 24(%ecx), %xmm3 # encoding: [0x0f,0x5a,0x59,0x18]
123
+ ; X32-SSE-NEXT: movups %xmm3, 48(%eax) # encoding: [0x0f,0x11,0x58,0x30]
124
+ ; X32-SSE-NEXT: movups %xmm2, 32(%eax) # encoding: [0x0f,0x11,0x50,0x20]
125
+ ; X32-SSE-NEXT: movups %xmm1, 16(%eax) # encoding: [0x0f,0x11,0x48,0x10]
126
+ ; X32-SSE-NEXT: movups %xmm0, (%eax) # encoding: [0x0f,0x11,0x00]
127
+ ; X32-SSE-NEXT: retl # encoding: [0xc3]
98
128
;
99
129
; X32-AVX-LABEL: fpext_frommem8:
100
130
; X32-AVX: # BB#0: # %entry
101
- ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
102
- ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx
103
- ; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0
104
- ; X32-AVX-NEXT: vcvtps2pd 16(%ecx), %ymm1
105
- ; X32-AVX-NEXT: vmovups %ymm1, 32(%eax)
106
- ; X32-AVX-NEXT: vmovups %ymm0, (%eax)
107
- ; X32-AVX-NEXT: vzeroupper
108
- ; X32-AVX-NEXT: retl
131
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
132
+ ; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
133
+ ; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x01]
134
+ ; X32-AVX-NEXT: vcvtps2pd 16(%ecx), %ymm1 # encoding: [0xc5,0xfc,0x5a,0x49,0x10]
135
+ ; X32-AVX-NEXT: vmovups %ymm1, 32(%eax) # encoding: [0xc5,0xfc,0x11,0x48,0x20]
136
+ ; X32-AVX-NEXT: vmovups %ymm0, (%eax) # encoding: [0xc5,0xfc,0x11,0x00]
137
+ ; X32-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
138
+ ; X32-AVX-NEXT: retl # encoding: [0xc3]
139
+ ;
140
+ ; X32-AVX512VL-LABEL: fpext_frommem8:
141
+ ; X32-AVX512VL: # BB#0: # %entry
142
+ ; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08]
143
+ ; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04]
144
+ ; X32-AVX512VL-NEXT: vcvtps2pd (%ecx), %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x5a,0x01]
145
+ ; X32-AVX512VL-NEXT: vmovups %zmm0, (%eax) # encoding: [0x62,0xf1,0x7c,0x48,0x11,0x00]
146
+ ; X32-AVX512VL-NEXT: retl # encoding: [0xc3]
109
147
;
110
148
; X64-SSE-LABEL: fpext_frommem8:
111
149
; X64-SSE: # BB#0: # %entry
112
- ; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0
113
- ; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1
114
- ; X64-SSE-NEXT: cvtps2pd 16(%rdi), %xmm2
115
- ; X64-SSE-NEXT: cvtps2pd 24(%rdi), %xmm3
116
- ; X64-SSE-NEXT: movups %xmm3, 48(%rsi)
117
- ; X64-SSE-NEXT: movups %xmm2, 32(%rsi)
118
- ; X64-SSE-NEXT: movups %xmm1, 16(%rsi)
119
- ; X64-SSE-NEXT: movups %xmm0, (%rsi)
120
- ; X64-SSE-NEXT: retq
150
+ ; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # encoding: [0x0f,0x5a,0x07]
151
+ ; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1 # encoding: [0x0f,0x5a,0x4f,0x08]
152
+ ; X64-SSE-NEXT: cvtps2pd 16(%rdi), %xmm2 # encoding: [0x0f,0x5a,0x57,0x10]
153
+ ; X64-SSE-NEXT: cvtps2pd 24(%rdi), %xmm3 # encoding: [0x0f,0x5a,0x5f,0x18]
154
+ ; X64-SSE-NEXT: movups %xmm3, 48(%rsi) # encoding: [0x0f,0x11,0x5e,0x30]
155
+ ; X64-SSE-NEXT: movups %xmm2, 32(%rsi) # encoding: [0x0f,0x11,0x56,0x20]
156
+ ; X64-SSE-NEXT: movups %xmm1, 16(%rsi) # encoding: [0x0f,0x11,0x4e,0x10]
157
+ ; X64-SSE-NEXT: movups %xmm0, (%rsi) # encoding: [0x0f,0x11,0x06]
158
+ ; X64-SSE-NEXT: retq # encoding: [0xc3]
121
159
;
122
160
; X64-AVX-LABEL: fpext_frommem8:
123
161
; X64-AVX: # BB#0: # %entry
124
- ; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0
125
- ; X64-AVX-NEXT: vcvtps2pd 16(%rdi), %ymm1
126
- ; X64-AVX-NEXT: vmovups %ymm1, 32(%rsi)
127
- ; X64-AVX-NEXT: vmovups %ymm0, (%rsi)
128
- ; X64-AVX-NEXT: vzeroupper
129
- ; X64-AVX-NEXT: retq
162
+ ; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x07]
163
+ ; X64-AVX-NEXT: vcvtps2pd 16(%rdi), %ymm1 # encoding: [0xc5,0xfc,0x5a,0x4f,0x10]
164
+ ; X64-AVX-NEXT: vmovups %ymm1, 32(%rsi) # encoding: [0xc5,0xfc,0x11,0x4e,0x20]
165
+ ; X64-AVX-NEXT: vmovups %ymm0, (%rsi) # encoding: [0xc5,0xfc,0x11,0x06]
166
+ ; X64-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77]
167
+ ; X64-AVX-NEXT: retq # encoding: [0xc3]
168
+ ;
169
+ ; X64-AVX512VL-LABEL: fpext_frommem8:
170
+ ; X64-AVX512VL: # BB#0: # %entry
171
+ ; X64-AVX512VL-NEXT: vcvtps2pd (%rdi), %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x5a,0x07]
172
+ ; X64-AVX512VL-NEXT: vmovups %zmm0, (%rsi) # encoding: [0x62,0xf1,0x7c,0x48,0x11,0x06]
173
+ ; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
130
174
entry:
131
175
%0 = load <8 x float >, <8 x float >* %in
132
176
%1 = fpext <8 x float > %0 to <8 x double >
@@ -138,22 +182,44 @@ define <2 x double> @fpext_fromconst() {
138
182
; X32-SSE-LABEL: fpext_fromconst:
139
183
; X32-SSE: # BB#0: # %entry
140
184
; X32-SSE-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
141
- ; X32-SSE-NEXT: retl
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+ ; X32-SSE-NEXT: # encoding: [0x0f,0x28,0x05,A,A,A,A]
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+ ; X32-SSE-NEXT: # fixup A - offset: 3, value: {{\.LCPI.*}}, kind: FK_Data_4
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+ ; X32-SSE-NEXT: retl # encoding: [0xc3]
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;
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; X32-AVX-LABEL: fpext_fromconst:
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; X32-AVX: # BB#0: # %entry
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; X32-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
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- ; X32-AVX-NEXT: retl
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+ ; X32-AVX-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A]
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+ ; X32-AVX-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}, kind: FK_Data_4
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+ ; X32-AVX-NEXT: retl # encoding: [0xc3]
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+ ;
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+ ; X32-AVX512VL-LABEL: fpext_fromconst:
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+ ; X32-AVX512VL: # BB#0: # %entry
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+ ; X32-AVX512VL-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
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+ ; X32-AVX512VL-NEXT: # encoding: [0x62,0xf1,0x7c,0x08,0x28,0x05,A,A,A,A]
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+ ; X32-AVX512VL-NEXT: # fixup A - offset: 6, value: {{\.LCPI.*}}, kind: FK_Data_4
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+ ; X32-AVX512VL-NEXT: retl # encoding: [0xc3]
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;
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; X64-SSE-LABEL: fpext_fromconst:
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; X64-SSE: # BB#0: # %entry
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; X64-SSE-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
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- ; X64-SSE-NEXT: retq
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+ ; X64-SSE-NEXT: # encoding: [0x0f,0x28,0x05,A,A,A,A]
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+ ; X64-SSE-NEXT: # fixup A - offset: 3, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte
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+ ; X64-SSE-NEXT: retq # encoding: [0xc3]
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;
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; X64-AVX-LABEL: fpext_fromconst:
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; X64-AVX: # BB#0: # %entry
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; X64-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
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- ; X64-AVX-NEXT: retq
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+ ; X64-AVX-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A]
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+ ; X64-AVX-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte
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+ ; X64-AVX-NEXT: retq # encoding: [0xc3]
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+ ;
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+ ; X64-AVX512VL-LABEL: fpext_fromconst:
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+ ; X64-AVX512VL: # BB#0: # %entry
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+ ; X64-AVX512VL-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
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+ ; X64-AVX512VL-NEXT: # encoding: [0x62,0xf1,0x7c,0x08,0x28,0x05,A,A,A,A]
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+ ; X64-AVX512VL-NEXT: # fixup A - offset: 6, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte
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+ ; X64-AVX512VL-NEXT: retq # encoding: [0xc3]
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entry:
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%0 = insertelement <2 x float > undef , float 1 .0 , i32 0
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%1 = insertelement <2 x float > %0 , float -2 .0 , i32 1
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