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1 |
| -;REQUIRES: asserts |
2 |
| -;RUN: not --crash llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix < %s 2>&1 | FileCheck %s |
3 |
| - |
4 |
| -;CHECK: %[[PHI1:[0-9]+]]:accrc = PHI |
5 |
| -;CHECK: %[[PHI0:[0-9]+]]:uaccrc = PHI |
6 |
| -;CHECK: Virtual register %[[PHI0]] is not needed live through the block. |
7 |
| -;CHECK: Virtual register %[[PHI1]] must be live through the block. |
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: llc -verify-machineinstrs -mtriple=powerpc64-ibm-aix < %s | FileCheck %s |
8 | 3 |
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9 | 4 | target datalayout = "E-m:a-Fi64-i64:64-n32:64-S128-v256:256:256-v512:512:512"
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10 | 5 |
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11 | 6 | define void @baz(i64 %arg) local_unnamed_addr #0 {
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| 7 | +; CHECK-LABEL: baz: |
| 8 | +; CHECK: # %bb.0: # %bb |
| 9 | +; CHECK-NEXT: xxmfacc 0 |
| 10 | +; CHECK-NEXT: xxmrgld 0, 0, 2 |
| 11 | +; CHECK-NEXT: xxlxor 1, 1, 1 |
| 12 | +; CHECK-NEXT: xvnegdp 2, 0 |
| 13 | +; CHECK-NEXT: xvnegdp 0, 0 |
| 14 | +; CHECK-NEXT: xvsubdp 2, 2, 1 |
| 15 | +; CHECK-NEXT: xvsubdp 0, 0, 3 |
| 16 | +; CHECK-NEXT: xvmuldp 2, 2, 1 |
| 17 | +; CHECK-NEXT: xvmuldp 0, 0, 1 |
| 18 | +; CHECK-NEXT: xvmaddadp 2, 1, 1 |
| 19 | +; CHECK-NEXT: xvmaddadp 0, 1, 1 |
| 20 | +; CHECK-NEXT: stxv 2, 0(3) |
| 21 | +; CHECK-NEXT: stxv 0, 0(3) |
| 22 | +; CHECK-NEXT: # implicit-def: $acc0 |
| 23 | +; CHECK-NEXT: bc 12, 20, L..BB0_2 |
| 24 | +; CHECK-NEXT: # %bb.1: # %bb10 |
| 25 | +; CHECK-NEXT: xvf64gerpp 0, 34, 0 |
| 26 | +; CHECK-NEXT: L..BB0_2: # %bb12 |
| 27 | +; CHECK-NEXT: cmpdi 3, 0 |
| 28 | +; CHECK-NEXT: L..BB0_3: # %bb13 |
| 29 | +; CHECK-NEXT: # |
| 30 | +; CHECK-NEXT: bc 4, 2, L..BB0_3 |
| 31 | +; CHECK-NEXT: # %bb.4: # %bb14 |
| 32 | +; CHECK-NEXT: xxmfacc 0 |
| 33 | +; CHECK-NEXT: xxlxor 0, 0, 0 |
| 34 | +; CHECK-NEXT: xxlxor 2, 2, 2 |
| 35 | +; CHECK-NEXT: xvsubdp 1, 0, 1 |
| 36 | +; CHECK-NEXT: xvmaddadp 2, 1, 2 |
| 37 | +; CHECK-NEXT: xvadddp 0, 2, 0 |
| 38 | +; CHECK-NEXT: xxswapd 0, 0 |
| 39 | +; CHECK-NEXT: stxv 0, 0(3) |
| 40 | +; CHECK-NEXT: blr |
12 | 41 | bb:
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13 | 42 | %call = tail call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.ppc.mma.disassemble.acc(<512 x i1> poison)
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14 | 43 | %extractvalue = extractvalue { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } %call, 0
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