Skip to content

Commit 001d7da

Browse files
committed
[InstCombine] Fix test failures with x86_fp80/ppc_fp128 types
1 parent d9a9ecd commit 001d7da

File tree

4 files changed

+20
-28
lines changed

4 files changed

+20
-28
lines changed

llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp

Lines changed: 13 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -2637,18 +2637,15 @@ Instruction *InstCombinerImpl::visitAnd(BinaryOperator &I) {
26372637
// This is a generous interpretation for noimplicitfloat, this is not a true
26382638
// floating-point operation.
26392639
//
2640-
// Assumes any IEEE-represented type has the sign bit in the high bit.
2640+
// Assumes any floating point type has the sign bit in the high bit.
26412641
// TODO: Unify with APInt matcher. This version allows undef unlike m_APInt
26422642
Value *CastOp;
26432643
if (match(Op0, m_ElementWiseBitCast(m_Value(CastOp))) &&
2644-
match(Op1, m_MaxSignedValue()) &&
2644+
CastOp->getType()->isFPOrFPVectorTy() && match(Op1, m_MaxSignedValue()) &&
26452645
!Builder.GetInsertBlock()->getParent()->hasFnAttribute(
26462646
Attribute::NoImplicitFloat)) {
2647-
Type *EltTy = CastOp->getType()->getScalarType();
2648-
if (EltTy->isIEEELikeFPTy()) {
2649-
Value *FAbs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, CastOp);
2650-
return new BitCastInst(FAbs, I.getType());
2651-
}
2647+
Value *FAbs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, CastOp);
2648+
return new BitCastInst(FAbs, I.getType());
26522649
}
26532650

26542651
// and(shl(zext(X), Y), SignMask) -> and(sext(X), SignMask)
@@ -4047,21 +4044,18 @@ Instruction *InstCombinerImpl::visitOr(BinaryOperator &I) {
40474044
// the number of instructions. This is still probably a better canonical form
40484045
// as it enables FP value tracking.
40494046
//
4050-
// Assumes any IEEE-represented type has the sign bit in the high bit.
4047+
// Assumes any floating point type has the sign bit in the high bit.
40514048
//
40524049
// This is generous interpretation of noimplicitfloat, this is not a true
40534050
// floating-point operation.
40544051
Value *CastOp;
40554052
if (match(Op0, m_ElementWiseBitCast(m_Value(CastOp))) &&
4056-
match(Op1, m_SignMask()) &&
4053+
CastOp->getType()->isFPOrFPVectorTy() && match(Op1, m_SignMask()) &&
40574054
!Builder.GetInsertBlock()->getParent()->hasFnAttribute(
40584055
Attribute::NoImplicitFloat)) {
4059-
Type *EltTy = CastOp->getType()->getScalarType();
4060-
if (EltTy->isIEEELikeFPTy()) {
4061-
Value *FAbs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, CastOp);
4062-
Value *FNegFAbs = Builder.CreateFNeg(FAbs);
4063-
return new BitCastInst(FNegFAbs, I.getType());
4064-
}
4056+
Value *FAbs = Builder.CreateUnaryIntrinsic(Intrinsic::fabs, CastOp);
4057+
Value *FNegFAbs = Builder.CreateFNeg(FAbs);
4058+
return new BitCastInst(FNegFAbs, I.getType());
40654059
}
40664060

40674061
// (X & C1) | C2 -> X & (C1 | C2) iff (X & C2) == C2
@@ -4851,18 +4845,15 @@ Instruction *InstCombinerImpl::visitXor(BinaryOperator &I) {
48514845
// This is generous interpretation of noimplicitfloat, this is not a true
48524846
// floating-point operation.
48534847
//
4854-
// Assumes any IEEE-represented type has the sign bit in the high bit.
4848+
// Assumes any floating point type has the sign bit in the high bit.
48554849
// TODO: Unify with APInt matcher. This version allows undef unlike m_APInt
48564850
Value *CastOp;
48574851
if (match(Op0, m_ElementWiseBitCast(m_Value(CastOp))) &&
4858-
match(Op1, m_SignMask()) &&
4852+
CastOp->getType()->isFPOrFPVectorTy() && match(Op1, m_SignMask()) &&
48594853
!Builder.GetInsertBlock()->getParent()->hasFnAttribute(
48604854
Attribute::NoImplicitFloat)) {
4861-
Type *EltTy = CastOp->getType()->getScalarType();
4862-
if (EltTy->isIEEELikeFPTy()) {
4863-
Value *FNeg = Builder.CreateFNeg(CastOp);
4864-
return new BitCastInst(FNeg, I.getType());
4865-
}
4855+
Value *FNeg = Builder.CreateFNeg(CastOp);
4856+
return new BitCastInst(FNeg, I.getType());
48664857
}
48674858
}
48684859

llvm/test/Transforms/InstCombine/fabs-as-int.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -289,8 +289,8 @@ define i128 @fabs_as_int_ppc_fp128_f64_mask(ppc_fp128 %x) {
289289
define i128 @fabs_as_int_ppc_fp128_f128_mask(ppc_fp128 %x) {
290290
; CHECK-LABEL: define i128 @fabs_as_int_ppc_fp128_f128_mask
291291
; CHECK-SAME: (ppc_fp128 [[X:%.*]]) {
292-
; CHECK-NEXT: [[BC:%.*]] = bitcast ppc_fp128 [[X]] to i128
293-
; CHECK-NEXT: [[AND:%.*]] = and i128 [[BC]], 170141183460469231731687303715884105727
292+
; CHECK-NEXT: [[TMP1:%.*]] = call ppc_fp128 @llvm.fabs.ppcf128(ppc_fp128 [[X]])
293+
; CHECK-NEXT: [[AND:%.*]] = bitcast ppc_fp128 [[TMP1]] to i128
294294
; CHECK-NEXT: ret i128 [[AND]]
295295
;
296296
%bc = bitcast ppc_fp128 %x to i128

llvm/test/Transforms/InstCombine/fneg-as-int.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -291,8 +291,8 @@ define i128 @fneg_as_int_ppc_fp128_f64_mask(ppc_fp128 %x) {
291291
define i128 @fneg_as_int_ppc_fp128_f128_mask(ppc_fp128 %x) {
292292
; CHECK-LABEL: define i128 @fneg_as_int_ppc_fp128_f128_mask
293293
; CHECK-SAME: (ppc_fp128 [[X:%.*]]) {
294-
; CHECK-NEXT: [[BC:%.*]] = bitcast ppc_fp128 [[X]] to i128
295-
; CHECK-NEXT: [[XOR:%.*]] = xor i128 [[BC]], -170141183460469231731687303715884105728
294+
; CHECK-NEXT: [[TMP1:%.*]] = fneg ppc_fp128 [[X]]
295+
; CHECK-NEXT: [[XOR:%.*]] = bitcast ppc_fp128 [[TMP1]] to i128
296296
; CHECK-NEXT: ret i128 [[XOR]]
297297
;
298298
%bc = bitcast ppc_fp128 %x to i128

llvm/test/Transforms/InstCombine/fneg-fabs-as-int.ll

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -317,8 +317,9 @@ define i128 @fneg_fabs_as_int_ppc_fp128_f64_mask(ppc_fp128 %x) {
317317
define i128 @fneg_fabs_as_int_ppc_fp128_f128_mask(ppc_fp128 %x) {
318318
; CHECK-LABEL: define i128 @fneg_fabs_as_int_ppc_fp128_f128_mask
319319
; CHECK-SAME: (ppc_fp128 [[X:%.*]]) {
320-
; CHECK-NEXT: [[BC:%.*]] = bitcast ppc_fp128 [[X]] to i128
321-
; CHECK-NEXT: [[OR:%.*]] = or i128 [[BC]], -170141183460469231731687303715884105728
320+
; CHECK-NEXT: [[TMP1:%.*]] = call ppc_fp128 @llvm.fabs.ppcf128(ppc_fp128 [[X]])
321+
; CHECK-NEXT: [[TMP2:%.*]] = fneg ppc_fp128 [[TMP1]]
322+
; CHECK-NEXT: [[OR:%.*]] = bitcast ppc_fp128 [[TMP2]] to i128
322323
; CHECK-NEXT: ret i128 [[OR]]
323324
;
324325
%bc = bitcast ppc_fp128 %x to i128

0 commit comments

Comments
 (0)