@@ -470,11 +470,11 @@ multiclass VPseudoVWALU_VV_VX_VI<Operand ImmType> {
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multiclass VPseudoVANDN {
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foreach m = MxList in {
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defm "" : VPseudoBinaryV_VV<m>,
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- SchedBinary<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV", m.MX,
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- forceMergeOpRead=true>;
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+ SchedBinary<"WriteVIALUV", "ReadVIALUV", "ReadVIALUV", m.MX,
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+ forceMergeOpRead=true>;
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defm "" : VPseudoBinaryV_VX<m>,
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- SchedBinary<"WriteVIALUX", "ReadVIALUV", "ReadVIALUX", m.MX,
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- forceMergeOpRead=true>;
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+ SchedBinary<"WriteVIALUX", "ReadVIALUV", "ReadVIALUX", m.MX,
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+ forceMergeOpRead=true>;
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}
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}
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@@ -497,11 +497,11 @@ multiclass VPseudoVREV8 {
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multiclass VPseudoVROL {
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foreach m = MxList in {
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defm "" : VPseudoBinaryV_VV<m>,
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- SchedBinary<"WriteVRotV", "ReadVRotV", "ReadVRotV", m.MX,
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- forceMergeOpRead=true>;
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+ SchedBinary<"WriteVRotV", "ReadVRotV", "ReadVRotV", m.MX,
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+ forceMergeOpRead=true>;
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defm "" : VPseudoBinaryV_VX<m>,
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- SchedBinary<"WriteVRotX", "ReadVRotV", "ReadVRotX", m.MX,
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- forceMergeOpRead=true>;
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+ SchedBinary<"WriteVRotX", "ReadVRotV", "ReadVRotX", m.MX,
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+ forceMergeOpRead=true>;
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}
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}
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@@ -510,13 +510,13 @@ multiclass VPseudoVROR<Operand ImmType> {
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foreach m = MxList in {
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defvar mx = m.MX;
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defm "" : VPseudoBinaryV_VV<m>,
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- SchedBinary<"WriteVRotV", "ReadVRotV", "ReadVRotV", mx,
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- forceMergeOpRead=true>;
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+ SchedBinary<"WriteVRotV", "ReadVRotV", "ReadVRotV", mx,
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+ forceMergeOpRead=true>;
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defm "" : VPseudoBinaryV_VX<m>,
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- SchedBinary<"WriteVRotX", "ReadVRotV", "ReadVRotX", mx,
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- forceMergeOpRead=true>;
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+ SchedBinary<"WriteVRotX", "ReadVRotV", "ReadVRotX", mx,
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+ forceMergeOpRead=true>;
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defm "" : VPseudoBinaryV_VI<ImmType, m>,
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- SchedUnary<"WriteVRotI", "ReadVRotV", mx, forceMergeOpRead=true>;
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+ SchedUnary<"WriteVRotI", "ReadVRotV", mx, forceMergeOpRead=true>;
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}
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}
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