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KoolJBlackKoolJBlack
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diego nits
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3 files changed

+36
-42
lines changed

3 files changed

+36
-42
lines changed

‎mlir/test/Dialect/ArmNeon/invalid.mlir

Lines changed: 18 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -35,65 +35,59 @@ func.func @b_has_2_rows_but_a_has_length_4(%a : vector<4xi32>, %b : vector<2x4xi
3535
// -----
3636

3737
func.func @smmla_invalid_input_types(%a: vector<16xi4>,
38-
%b: vector<16xi4>,
39-
%c: vector<4xi32>) -> vector<4xi32> {
38+
%b: vector<16xi4>,
39+
%c: vector<4xi32>) -> vector<4xi32> {
4040
// expected-error@+1 {{op operand #1 must be vector of 8-bit signless integer values of length 16, but got 'vector<16xi4>'}}
41-
%0 = arm_neon.intr.smmla %c, %a, %b :
42-
vector<16xi4> to vector<4xi32>
41+
%0 = arm_neon.intr.smmla %c, %a, %b : vector<16xi4> to vector<4xi32>
4342
return %0 : vector<4xi32>
4443
}
4544

4645
// -----
4746

4847
func.func @smmla_invalid_dimensions(%a: vector<32xi8>,
49-
%b: vector<32xi8>,
50-
%c: vector<8xi32>) -> vector<8xi32> {
48+
%b: vector<32xi8>,
49+
%c: vector<8xi32>) -> vector<8xi32> {
5150
// expected-error@+1 {{op operand #0 must be vector of 32-bit signless integer values of length 4, but got 'vector<8xi32>'}}
52-
%0 = arm_neon.intr.smmla %c, %a, %b :
53-
vector<32xi8> to vector<8xi32>
51+
%0 = arm_neon.intr.smmla %c, %a, %b : vector<32xi8> to vector<8xi32>
5452
return %0 : vector<8xi32>
5553
}
5654

5755
// -----
5856

5957
func.func @ummla_invalid_input_types(%a: vector<16xi4>,
60-
%b: vector<16xi4>,
61-
%c: vector<4xi32>) -> vector<4xi32> {
58+
%b: vector<16xi4>,
59+
%c: vector<4xi32>) -> vector<4xi32> {
6260
// expected-error@+1 {{op operand #1 must be vector of 8-bit signless integer values of length 16, but got 'vector<16xi4>'}}
63-
%0 = arm_neon.intr.ummla %c, %a, %b :
64-
vector<16xi4> to vector<4xi32>
61+
%0 = arm_neon.intr.ummla %c, %a, %b : vector<16xi4> to vector<4xi32>
6562
return %0 : vector<4xi32>
6663
}
6764

6865
// -----
6966

7067
func.func @ummla_invalid_dimensions(%a: vector<32xi8>,
71-
%b: vector<32xi8>,
72-
%c: vector<8xi32>) -> vector<8xi32> {
68+
%b: vector<32xi8>,
69+
%c: vector<8xi32>) -> vector<8xi32> {
7370
// expected-error@+1 {{op operand #0 must be vector of 32-bit signless integer values of length 4, but got 'vector<8xi32>'}}
74-
%0 = arm_neon.intr.ummla %c, %a, %b :
75-
vector<32xi8> to vector<8xi32>
71+
%0 = arm_neon.intr.ummla %c, %a, %b : vector<32xi8> to vector<8xi32>
7672
return %0 : vector<8xi32>
7773
}
7874

7975
// -----
8076

8177
func.func @usmmla_invalid_input_types(%a: vector<16xi4>,
82-
%b: vector<16xi4>,
83-
%c: vector<4xi32>) -> vector<4xi32> {
78+
%b: vector<16xi4>,
79+
%c: vector<4xi32>) -> vector<4xi32> {
8480
// expected-error@+1 {{op operand #1 must be vector of 8-bit signless integer values of length 16, but got 'vector<16xi4>'}}
85-
%0 = arm_neon.intr.usmmla %c, %a, %b :
86-
vector<16xi4> to vector<4xi32>
81+
%0 = arm_neon.intr.usmmla %c, %a, %b : vector<16xi4> to vector<4xi32>
8782
return %0 : vector<4xi32>
8883
}
8984

9085
// -----
9186

9287
func.func @usmmla_invalid_dimensions(%a: vector<32xi8>,
93-
%b: vector<32xi8>,
94-
%c: vector<8xi32>) -> vector<8xi32> {
88+
%b: vector<32xi8>,
89+
%c: vector<8xi32>) -> vector<8xi32> {
9590
// expected-error@+1 {{op operand #0 must be vector of 32-bit signless integer values of length 4, but got 'vector<8xi32>'}}
96-
%0 = arm_neon.intr.usmmla %c, %a, %b :
97-
vector<32xi8> to vector<8xi32>
91+
%0 = arm_neon.intr.usmmla %c, %a, %b : vector<32xi8> to vector<8xi32>
9892
return %0 : vector<8xi32>
9993
}

‎mlir/test/Dialect/ArmNeon/roundtrip.mlir

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -28,33 +28,33 @@ func.func @arm_neon_sdot(%a: vector<2xi32>, %b: vector<8xi8>, %c: vector<8xi8>)
2828

2929
// -----
3030

31+
// CHECK-LABEL: arm_neon_smmla
3132
func.func @arm_neon_smmla(%a: vector<16xi8>,
32-
%b: vector<16xi8>,
33-
%c: vector<4xi32>) -> vector<4xi32> {
33+
%b: vector<16xi8>,
34+
%c: vector<4xi32>) -> vector<4xi32> {
3435
// CHECK: arm_neon.intr.smmla {{.*}}: vector<16xi8> to vector<4xi3
35-
%0 = arm_neon.intr.smmla %c, %a, %b :
36-
vector<16xi8> to vector<4xi32>
36+
%0 = arm_neon.intr.smmla %c, %a, %b : vector<16xi8> to vector<4xi32>
3737
return %0 : vector<4xi32>
3838
}
3939

4040
// -----
4141

42+
// CHECK-LABEL: arm_neon_ummla
4243
func.func @arm_neon_ummla(%a: vector<16xi8>,
43-
%b: vector<16xi8>,
44-
%c: vector<4xi32>) -> vector<4xi32> {
44+
%b: vector<16xi8>,
45+
%c: vector<4xi32>) -> vector<4xi32> {
4546
// CHECK: arm_neon.intr.ummla {{.*}}: vector<16xi8> to vector<4xi3
46-
%0 = arm_neon.intr.ummla %c, %a, %b :
47-
vector<16xi8> to vector<4xi32>
47+
%0 = arm_neon.intr.ummla %c, %a, %b : vector<16xi8> to vector<4xi32>
4848
return %0 : vector<4xi32>
4949
}
5050

5151
// -----
5252

53+
// CHECK-LABEL: arm_neon_usmmla
5354
func.func @arm_neon_usmmla(%a: vector<16xi8>,
54-
%b: vector<16xi8>,
55-
%c: vector<4xi32>) -> vector<4xi32> {
55+
%b: vector<16xi8>,
56+
%c: vector<4xi32>) -> vector<4xi32> {
5657
// CHECK: arm_neon.intr.usmmla {{.*}}: vector<16xi8> to vector<4xi3
57-
%0 = arm_neon.intr.usmmla %c, %a, %b :
58-
vector<16xi8> to vector<4xi32>
58+
%0 = arm_neon.intr.usmmla %c, %a, %b : vector<16xi8> to vector<4xi32>
5959
return %0 : vector<4xi32>
6060
}

‎mlir/test/Target/LLVMIR/arm-neon.mlir

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -44,8 +44,8 @@ llvm.func @arm_neon_sdot_16_i8i8(%a: vector<4xi32>, %b: vector<16xi8>, %c: vecto
4444

4545
// CHECK-LABEL: define <4 x i32> @arm_neon_smmla
4646
llvm.func @arm_neon_smmla(%arg0: vector<16xi8>,
47-
%arg1: vector<16xi8>,
48-
%arg2: vector<4xi32>)
47+
%arg1: vector<16xi8>,
48+
%arg2: vector<4xi32>)
4949
-> vector<4xi32> {
5050
// CHECK: <4 x i32> @llvm.aarch64.neon.smmla.v4i32.v16i8(<4 x i32
5151
%0 = "arm_neon.intr.smmla"(%arg2, %arg0, %arg1) :
@@ -58,8 +58,8 @@ llvm.func @arm_neon_smmla(%arg0: vector<16xi8>,
5858

5959
// CHECK-LABEL: define <4 x i32> @arm_neon_ummla
6060
llvm.func @arm_neon_ummla(%arg0: vector<16xi8>,
61-
%arg1: vector<16xi8>,
62-
%arg2: vector<4xi32>)
61+
%arg1: vector<16xi8>,
62+
%arg2: vector<4xi32>)
6363
-> vector<4xi32> {
6464
// CHECK: <4 x i32> @llvm.aarch64.neon.ummla.v4i32.v16i8(<4 x i32
6565
%0 = "arm_neon.intr.ummla"(%arg2, %arg0, %arg1) :
@@ -72,8 +72,8 @@ llvm.func @arm_neon_ummla(%arg0: vector<16xi8>,
7272

7373
// CHECK-LABEL: define <4 x i32> @arm_neon_usmmla
7474
llvm.func @arm_neon_usmmla(%arg0: vector<16xi8>,
75-
%arg1: vector<16xi8>,
76-
%arg2: vector<4xi32>)
75+
%arg1: vector<16xi8>,
76+
%arg2: vector<4xi32>)
7777
-> vector<4xi32> {
7878
// CHECK: <4 x i32> @llvm.aarch64.neon.usmmla.v4i32.v16i8(<4 x i32
7979
%0 = "arm_neon.intr.usmmla"(%arg2, %arg0, %arg1) :

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