|
799 | 799 | // CHECK_KNL_M32: #define __AVX__ 1
|
800 | 800 | // CHECK_KNL_M32: #define __BMI2__ 1
|
801 | 801 | // CHECK_KNL_M32: #define __BMI__ 1
|
| 802 | +// CHECK_KNL_M32: #define __EVEX512__ 1 |
802 | 803 | // CHECK_KNL_M32: #define __F16C__ 1
|
803 | 804 | // CHECK_KNL_M32: #define __FMA__ 1
|
804 | 805 | // CHECK_KNL_M32: #define __LZCNT__ 1
|
|
836 | 837 | // CHECK_KNL_M64: #define __AVX__ 1
|
837 | 838 | // CHECK_KNL_M64: #define __BMI2__ 1
|
838 | 839 | // CHECK_KNL_M64: #define __BMI__ 1
|
| 840 | +// CHECK_KNL_M64: #define __EVEX512__ 1 |
839 | 841 | // CHECK_KNL_M64: #define __F16C__ 1
|
840 | 842 | // CHECK_KNL_M64: #define __FMA__ 1
|
841 | 843 | // CHECK_KNL_M64: #define __LZCNT__ 1
|
|
877 | 879 | // CHECK_KNM_M32: #define __AVX__ 1
|
878 | 880 | // CHECK_KNM_M32: #define __BMI2__ 1
|
879 | 881 | // CHECK_KNM_M32: #define __BMI__ 1
|
| 882 | +// CHECK_KNM_M32: #define __EVEX512__ 1 |
880 | 883 | // CHECK_KNM_M32: #define __F16C__ 1
|
881 | 884 | // CHECK_KNM_M32: #define __FMA__ 1
|
882 | 885 | // CHECK_KNM_M32: #define __LZCNT__ 1
|
|
912 | 915 | // CHECK_KNM_M64: #define __AVX__ 1
|
913 | 916 | // CHECK_KNM_M64: #define __BMI2__ 1
|
914 | 917 | // CHECK_KNM_M64: #define __BMI__ 1
|
| 918 | +// CHECK_KNM_M64: #define __EVEX512__ 1 |
915 | 919 | // CHECK_KNM_M64: #define __F16C__ 1
|
916 | 920 | // CHECK_KNM_M64: #define __FMA__ 1
|
917 | 921 | // CHECK_KNM_M64: #define __LZCNT__ 1
|
|
952 | 956 | // CHECK_SKX_M32: #define __BMI__ 1
|
953 | 957 | // CHECK_SKX_M32: #define __CLFLUSHOPT__ 1
|
954 | 958 | // CHECK_SKX_M32: #define __CLWB__ 1
|
| 959 | +// CHECK_SKX_M32: #define __EVEX512__ 1 |
955 | 960 | // CHECK_SKX_M32: #define __F16C__ 1
|
956 | 961 | // CHECK_SKX_M32: #define __FMA__ 1
|
957 | 962 | // CHECK_SKX_M32: #define __INVPCID__ 1
|
|
997 | 1002 | // CHECK_SKX_M64: #define __BMI__ 1
|
998 | 1003 | // CHECK_SKX_M64: #define __CLFLUSHOPT__ 1
|
999 | 1004 | // CHECK_SKX_M64: #define __CLWB__ 1
|
| 1005 | +// CHECK_SKX_M64: #define __EVEX512__ 1 |
1000 | 1006 | // CHECK_SKX_M64: #define __F16C__ 1
|
1001 | 1007 | // CHECK_SKX_M64: #define __FMA__ 1
|
1002 | 1008 | // CHECK_SKX_M64: #define __INVPCID__ 1
|
|
1046 | 1052 | // CHECK_CLX_M32: #define __BMI__ 1
|
1047 | 1053 | // CHECK_CLX_M32: #define __CLFLUSHOPT__ 1
|
1048 | 1054 | // CHECK_CLX_M32: #define __CLWB__ 1
|
| 1055 | +// CHECK_CLX_M32: #define __EVEX512__ 1 |
1049 | 1056 | // CHECK_CLX_M32: #define __F16C__ 1
|
1050 | 1057 | // CHECK_CLX_M32: #define __FMA__ 1
|
1051 | 1058 | // CHECK_CLX_M32: #define __INVPCID__ 1
|
|
1092 | 1099 | // CHECK_CLX_M64: #define __BMI__ 1
|
1093 | 1100 | // CHECK_CLX_M64: #define __CLFLUSHOPT__ 1
|
1094 | 1101 | // CHECK_CLX_M64: #define __CLWB__ 1
|
| 1102 | +// CHECK_CLX_M64: #define __EVEX512__ 1 |
1095 | 1103 | // CHECK_CLX_M64: #define __F16C__ 1
|
1096 | 1104 | // CHECK_CLX_M64: #define __FMA__ 1
|
1097 | 1105 | // CHECK_CLX_M64: #define __INVPCID__ 1
|
|
1142 | 1150 | // CHECK_CPX_M32: #define __BMI__ 1
|
1143 | 1151 | // CHECK_CPX_M32: #define __CLFLUSHOPT__ 1
|
1144 | 1152 | // CHECK_CPX_M32: #define __CLWB__ 1
|
| 1153 | +// CHECK_CPX_M32: #define __EVEX512__ 1 |
1145 | 1154 | // CHECK_CPX_M32: #define __F16C__ 1
|
1146 | 1155 | // CHECK_CPX_M32: #define __FMA__ 1
|
1147 | 1156 | // CHECK_CPX_M32: #define __INVPCID__ 1
|
|
1189 | 1198 | // CHECK_CPX_M64: #define __BMI__ 1
|
1190 | 1199 | // CHECK_CPX_M64: #define __CLFLUSHOPT__ 1
|
1191 | 1200 | // CHECK_CPX_M64: #define __CLWB__ 1
|
| 1201 | +// CHECK_CPX_M64: #define __EVEX512__ 1 |
1192 | 1202 | // CHECK_CPX_M64: #define __F16C__ 1
|
1193 | 1203 | // CHECK_CPX_M64: #define __FMA__ 1
|
1194 | 1204 | // CHECK_CPX_M64: #define __INVPCID__ 1
|
|
1239 | 1249 | // CHECK_CNL_M32: #define __BMI__ 1
|
1240 | 1250 | // CHECK_CNL_M32: #define __CLFLUSHOPT__ 1
|
1241 | 1251 | // CHECK_CNL_M32-NOT: #define __CLWB__ 1
|
| 1252 | +// CHECK_CNL_M32: #define __EVEX512__ 1 |
1242 | 1253 | // CHECK_CNL_M32: #define __F16C__ 1
|
1243 | 1254 | // CHECK_CNL_M32: #define __FMA__ 1
|
1244 | 1255 | // CHECK_CNL_M32: #define __INVPCID__ 1
|
|
1287 | 1298 | // CHECK_CNL_M64: #define __BMI__ 1
|
1288 | 1299 | // CHECK_CNL_M64: #define __CLFLUSHOPT__ 1
|
1289 | 1300 | // CHECK_CNL_M64-NOT: #define __CLWB__ 1
|
| 1301 | +// CHECK_CNL_M64: #define __EVEX512__ 1 |
1290 | 1302 | // CHECK_CNL_M64: #define __F16C__ 1
|
1291 | 1303 | // CHECK_CNL_M64: #define __FMA__ 1
|
1292 | 1304 | // CHECK_CNL_M64: #define __INVPCID__ 1
|
|
1343 | 1355 | // CHECK_ICL_M32: #define __BMI__ 1
|
1344 | 1356 | // CHECK_ICL_M32: #define __CLFLUSHOPT__ 1
|
1345 | 1357 | // CHECK_ICL_M32-NOT: #define __CLWB__ 1
|
| 1358 | +// CHECK_ICL_M32: #define __EVEX512__ 1 |
1346 | 1359 | // CHECK_ICL_M32: #define __F16C__ 1
|
1347 | 1360 | // CHECK_ICL_M32: #define __FMA__ 1
|
1348 | 1361 | // CHECK_ICL_M32: #define __GFNI__ 1
|
|
1404 | 1417 | // CHECK_ICL_M64: #define __BMI__ 1
|
1405 | 1418 | // CHECK_ICL_M64: #define __CLFLUSHOPT__ 1
|
1406 | 1419 | // CHECK_ICL_M64-NOT: #define __CLWB__ 1
|
| 1420 | +// CHECK_ICL_M64: #define __EVEX512__ 1 |
1407 | 1421 | // CHECK_ICL_M64: #define __F16C__ 1
|
1408 | 1422 | // CHECK_ICL_M64: #define __FMA__ 1
|
1409 | 1423 | // CHECK_ICL_M64: #define __GFNI__ 1
|
|
1463 | 1477 | // CHECK_ICX_M32: #define __BMI__ 1
|
1464 | 1478 | // CHECK_ICX_M32: #define __CLFLUSHOPT__ 1
|
1465 | 1479 | // CHECK_ICX_M32: #define __CLWB__ 1
|
| 1480 | +// CHECK_ICX_M32: #define __EVEX512__ 1 |
1466 | 1481 | // CHECK_ICX_M32: #define __F16C__ 1
|
1467 | 1482 | // CHECK_ICX_M32: #define __FMA__ 1
|
1468 | 1483 | // CHECK_ICX_M32: #define __GFNI__ 1
|
|
1521 | 1536 | // CHECK_ICX_M64: #define __BMI__ 1
|
1522 | 1537 | // CHECK_ICX_M64: #define __CLFLUSHOPT__ 1
|
1523 | 1538 | // CHECK_ICX_M64: #define __CLWB__ 1
|
| 1539 | +// CHECK_ICX_M64: #define __EVEX512__ 1 |
1524 | 1540 | // CHECK_ICX_M64: #define __F16C__ 1
|
1525 | 1541 | // CHECK_ICX_M64: #define __FMA__ 1
|
1526 | 1542 | // CHECK_ICX_M64: #define __GFNI__ 1
|
|
1581 | 1597 | // CHECK_TGL_M32: #define __BMI__ 1
|
1582 | 1598 | // CHECK_TGL_M32: #define __CLFLUSHOPT__ 1
|
1583 | 1599 | // CHECK_TGL_M32: #define __CLWB__ 1
|
| 1600 | +// CHECK_TGL_M32: #define __EVEX512__ 1 |
1584 | 1601 | // CHECK_TGL_M32: #define __F16C__ 1
|
1585 | 1602 | // CHECK_TGL_M32: #define __FMA__ 1
|
1586 | 1603 | // CHECK_TGL_M32: #define __GFNI__ 1
|
|
1643 | 1660 | // CHECK_TGL_M64: #define __BMI__ 1
|
1644 | 1661 | // CHECK_TGL_M64: #define __CLFLUSHOPT__ 1
|
1645 | 1662 | // CHECK_TGL_M64: #define __CLWB__ 1
|
| 1663 | +// CHECK_TGL_M64: #define __EVEX512__ 1 |
1646 | 1664 | // CHECK_TGL_M64: #define __F16C__ 1
|
1647 | 1665 | // CHECK_TGL_M64: #define __FMA__ 1
|
1648 | 1666 | // CHECK_TGL_M64: #define __GFNI__ 1
|
|
1716 | 1734 | // CHECK_SPR_M32: #define __CLFLUSHOPT__ 1
|
1717 | 1735 | // CHECK_SPR_M32: #define __CLWB__ 1
|
1718 | 1736 | // CHECK_SPR_M32: #define __ENQCMD__ 1
|
| 1737 | +// CHECK_SPR_M32: #define __EVEX512__ 1 |
1719 | 1738 | // CHECK_SPR_M32: #define __F16C__ 1
|
1720 | 1739 | // CHECK_SPR_M32: #define __FMA__ 1
|
1721 | 1740 | // CHECK_SPR_M32: #define __GFNI__ 1
|
|
1791 | 1810 | // CHECK_SPR_M64: #define __CLFLUSHOPT__ 1
|
1792 | 1811 | // CHECK_SPR_M64: #define __CLWB__ 1
|
1793 | 1812 | // CHECK_SPR_M64: #define __ENQCMD__ 1
|
| 1813 | +// CHECK_SPR_M64: #define __EVEX512__ 1 |
1794 | 1814 | // CHECK_SPR_M64: #define __F16C__ 1
|
1795 | 1815 | // CHECK_SPR_M64: #define __FMA__ 1
|
1796 | 1816 | // CHECK_SPR_M64: #define __GFNI__ 1
|
|
1870 | 1890 | // CHECK_GNR_M32: #define __CLFLUSHOPT__ 1
|
1871 | 1891 | // CHECK_GNR_M32: #define __CLWB__ 1
|
1872 | 1892 | // CHECK_GNR_M32: #define __ENQCMD__ 1
|
| 1893 | +// CHECK_GNR_M32: #define __EVEX512__ 1 |
1873 | 1894 | // CHECK_GNR_M32: #define __F16C__ 1
|
1874 | 1895 | // CHECK_GNR_M32: #define __FMA__ 1
|
1875 | 1896 | // CHECK_GNR_M32: #define __GFNI__ 1
|
|
1949 | 1970 | // CHECK_GNR_M64: #define __CLFLUSHOPT__ 1
|
1950 | 1971 | // CHECK_GNR_M64: #define __CLWB__ 1
|
1951 | 1972 | // CHECK_GNR_M64: #define __ENQCMD__ 1
|
| 1973 | +// CHECK_GNR_M64: #define __EVEX512__ 1 |
1952 | 1974 | // CHECK_GNR_M64: #define __F16C__ 1
|
1953 | 1975 | // CHECK_GNR_M64: #define __FMA__ 1
|
1954 | 1976 | // CHECK_GNR_M64: #define __GFNI__ 1
|
|
3845 | 3867 | // CHECK_ZNVER4_M32: #define __CLFLUSHOPT__ 1
|
3846 | 3868 | // CHECK_ZNVER4_M32: #define __CLWB__ 1
|
3847 | 3869 | // CHECK_ZNVER4_M32: #define __CLZERO__ 1
|
| 3870 | +// CHECK_ZNVER4_M32: #define __EVEX512__ 1 |
3848 | 3871 | // CHECK_ZNVER4_M32: #define __F16C__ 1
|
3849 | 3872 | // CHECK_ZNVER4_M32-NOT: #define __FMA4__ 1
|
3850 | 3873 | // CHECK_ZNVER4_M32: #define __FMA__ 1
|
|
3909 | 3932 | // CHECK_ZNVER4_M64: #define __CLFLUSHOPT__ 1
|
3910 | 3933 | // CHECK_ZNVER4_M64: #define __CLWB__ 1
|
3911 | 3934 | // CHECK_ZNVER4_M64: #define __CLZERO__ 1
|
| 3935 | +// CHECK_ZNVER4_M64: #define __EVEX512__ 1 |
3912 | 3936 | // CHECK_ZNVER4_M64: #define __F16C__ 1
|
3913 | 3937 | // CHECK_ZNVER4_M64-NOT: #define __FMA4__ 1
|
3914 | 3938 | // CHECK_ZNVER4_M64: #define __FMA__ 1
|
|
0 commit comments