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rename utility function
1 parent 2c26a65 commit 05be13d

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4 files changed

+8
-8
lines changed

4 files changed

+8
-8
lines changed

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3578,11 +3578,12 @@ SDValue AMDGPUTargetLowering::LowerFP_TO_FP16(SDValue Op, SelectionDAG &DAG) con
35783578
return SDValue();
35793579
}
35803580

3581-
return LowerF64ToF16(N0, DL, DAG);
3581+
return LowerF64ToF16Safe(N0, DL, DAG);
35823582
}
35833583

3584-
SDValue AMDGPUTargetLowering::LowerF64ToF16(SDValue Src, const SDLoc &DL,
3585-
SelectionDAG &DAG) const {
3584+
// return node in i32
3585+
SDValue AMDGPUTargetLowering::LowerF64ToF16Safe(SDValue Src, const SDLoc &DL,
3586+
SelectionDAG &DAG) const {
35863587
assert(Src.getSimpleValueType() == MVT::f64);
35873588

35883589
// f64 -> f16 conversion using round-to-nearest-even rounding mode.

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -97,7 +97,8 @@ class AMDGPUTargetLowering : public TargetLowering {
9797
SDValue LowerFP_TO_FP16(SDValue Op, SelectionDAG &DAG) const;
9898
SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const;
9999

100-
SDValue LowerF64ToF16(SDValue Src, const SDLoc &DL, SelectionDAG &DAG) const;
100+
SDValue LowerF64ToF16Safe(SDValue Src, const SDLoc &DL,
101+
SelectionDAG &DAG) const;
101102

102103
SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
103104

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6909,7 +6909,7 @@ SDValue SITargetLowering::lowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const {
69096909
SDValue Src32 = DAG.getNode(ISD::FP_ROUND, DL, MVT::f32, Src, Flags);
69106910
return DAG.getNode(ISD::FP_ROUND, DL, MVT::f16, Src32, Flags);
69116911
}
6912-
SDValue FpToFp16 = LowerF64ToF16(Src, DL, DAG);
6912+
SDValue FpToFp16 = LowerF64ToF16Safe(Src, DL, DAG);
69136913
SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, MVT::i16, FpToFp16);
69146914
return DAG.getNode(ISD::BITCAST, DL, MVT::f16, Trunc);
69156915
}

llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -756,9 +756,7 @@ define amdgpu_kernel void @fptrunc_v2f64_to_v2f16(
756756
; GFX950-SDAG-NEXT: s_waitcnt vmcnt(0)
757757
; GFX950-SDAG-NEXT: v_cvt_f32_f64_e32 v2, v[2:3]
758758
; GFX950-SDAG-NEXT: v_cvt_f32_f64_e32 v0, v[0:1]
759-
; GFX950-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v2
760-
; GFX950-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
761-
; GFX950-SDAG-NEXT: v_lshl_or_b32 v0, v1, 16, v0
759+
; GFX950-SDAG-NEXT: v_cvt_pk_f16_f32 v0, v0, v2
762760
; GFX950-SDAG-NEXT: buffer_store_dword v0, off, s[4:7], 0
763761
; GFX950-SDAG-NEXT: s_endpgm
764762
;

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