We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
1 parent 2c0b6f2 commit 092ef55Copy full SHA for 092ef55
llvm/test/CodeGen/AArch64/misched-branch-targets.mir
@@ -1,6 +1,9 @@
1
# RUN: llc -o - -run-pass=machine-scheduler -misched=shuffle %s | FileCheck %s
2
# RUN: llc -o - -run-pass=postmisched %s | FileCheck %s
3
4
+# REQUIRES: asserts
5
+# -misched=shuffle is only available with assertions enabled
6
+
7
# Check that instructions that are recognized as branch targets by BTI
8
# are not reordered by machine instruction schedulers.
9
0 commit comments