@@ -1109,74 +1109,38 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute {
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Function *F = getAssociatedFunction ();
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auto &InfoCache = static_cast <AMDGPUInformationCache &>(A.getInfoCache ());
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- auto TakeRange = [&](std::pair<unsigned , unsigned > R) {
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- auto [Min, Max] = R;
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- ConstantRange Range (APInt (32 , Min), APInt (32 , Max + 1 ));
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- IntegerRangeState RangeState (Range);
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- clampStateAndIndicateChange (this ->getState (), RangeState);
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- indicateOptimisticFixpoint ();
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- };
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-
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- std::pair<unsigned , unsigned > MaxWavesPerEURange{
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- 1U , InfoCache.getMaxWavesPerEU (*F)};
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-
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// If the attribute exists, we will honor it if it is not the default.
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if (auto Attr = InfoCache.getWavesPerEUAttr (*F)) {
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+ std::pair<unsigned , unsigned > MaxWavesPerEURange{
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+ 1U , InfoCache.getMaxWavesPerEU (*F)};
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if (*Attr != MaxWavesPerEURange) {
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- TakeRange (*Attr);
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+ auto [Min, Max] = *Attr;
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+ ConstantRange Range (APInt (32 , Min), APInt (32 , Max + 1 ));
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+ IntegerRangeState RangeState (Range);
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+ clampStateAndIndicateChange (this ->getState (), RangeState);
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+ indicateOptimisticFixpoint ();
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return ;
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}
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}
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- // Unlike AAAMDFlatWorkGroupSize, it's getting trickier here. Since the
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- // calculation of waves per EU involves flat work group size, we can't
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- // simply use an assumed flat work group size as a start point, because the
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- // update of flat work group size is in an inverse direction of waves per
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- // EU. However, we can still do something if it is an entry function. Since
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- // an entry function is a terminal node, and flat work group size either
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- // from attribute or default will be used anyway, we can take that value and
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- // calculate the waves per EU based on it. This result can't be updated by
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- // no means, but that could still allow us to propagate it.
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- if (AMDGPU::isEntryFunctionCC (F->getCallingConv ())) {
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- std::pair<unsigned , unsigned > FlatWorkGroupSize;
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- if (auto Attr = InfoCache.getFlatWorkGroupSizeAttr (*F))
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- FlatWorkGroupSize = *Attr;
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- else
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- FlatWorkGroupSize = InfoCache.getDefaultFlatWorkGroupSize (*F);
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- TakeRange (InfoCache.getEffectiveWavesPerEU (*F, MaxWavesPerEURange,
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- FlatWorkGroupSize));
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- }
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+ if (AMDGPU::isEntryFunctionCC (F->getCallingConv ()))
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+ indicatePessimisticFixpoint ();
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}
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ChangeStatus updateImpl (Attributor &A) override {
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- auto &InfoCache = static_cast <AMDGPUInformationCache &>(A.getInfoCache ());
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ChangeStatus Change = ChangeStatus::UNCHANGED;
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auto CheckCallSite = [&](AbstractCallSite CS) {
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Function *Caller = CS.getInstruction ()->getFunction ();
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- Function *Func = getAssociatedFunction ();
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- LLVM_DEBUG (dbgs () << ' [' << getName () << " ] Call " << Caller->getName ()
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- << " ->" << Func->getName () << ' \n ' );
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-
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const auto *CallerInfo = A.getAAFor <AAAMDWavesPerEU>(
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*this , IRPosition::function (*Caller), DepClassTy::REQUIRED);
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- const auto *AssumedGroupSize = A.getAAFor <AAAMDFlatWorkGroupSize>(
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- *this , IRPosition::function (*Func), DepClassTy::REQUIRED);
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- if (!CallerInfo || !AssumedGroupSize || !CallerInfo->isValidState () ||
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- !AssumedGroupSize->isValidState ())
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+ if (!CallerInfo || !CallerInfo->isValidState ())
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return false ;
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-
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- unsigned Min, Max;
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- std::tie (Min, Max) = InfoCache.getEffectiveWavesPerEU (
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- *Caller,
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- {CallerInfo->getAssumed ().getLower ().getZExtValue (),
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- CallerInfo->getAssumed ().getUpper ().getZExtValue () - 1 },
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- {AssumedGroupSize->getAssumed ().getLower ().getZExtValue (),
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- AssumedGroupSize->getAssumed ().getUpper ().getZExtValue () - 1 });
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- ConstantRange CallerRange (APInt (32 , Min), APInt (32 , Max + 1 ));
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+ unsigned Min = CallerInfo->getAssumed ().getLower ().getZExtValue ();
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+ unsigned Max = CallerInfo->getAssumed ().getUpper ().getZExtValue ();
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+ ConstantRange CallerRange (APInt (32 , Min), APInt (32 , Max));
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IntegerRangeState CallerRangeState (CallerRange);
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Change |= clampStateAndIndicateChange (this ->getState (), CallerRangeState);
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-
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return true ;
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};
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@@ -1329,6 +1293,59 @@ static void addPreloadKernArgHint(Function &F, TargetMachine &TM) {
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}
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}
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+ static void checkWavesPerEU (Module &M, TargetMachine &TM) {
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+ for (Function &F : M) {
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+ const GCNSubtarget &ST = TM.getSubtarget <GCNSubtarget>(F);
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+
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+ auto FlatWgrpSizeAttr =
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+ AMDGPU::getIntegerPairAttribute (F, " amdgpu-flat-work-group-size" );
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+ auto WavesPerEUAttr = AMDGPU::getIntegerPairAttribute (
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+ F, " amdgpu-waves-per-eu" , /* OnlyFirstRequired=*/ true );
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+
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+ unsigned MinWavesPerEU = ST.getMinWavesPerEU ();
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+ unsigned MaxWavesPerEU = ST.getMaxWavesPerEU ();
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+
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+ unsigned MinFlatWgrpSize = 1U ;
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+ unsigned MaxFlatWgrpSize = 1024U ;
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+ if (FlatWgrpSizeAttr.has_value ()) {
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+ MinFlatWgrpSize = FlatWgrpSizeAttr->first ;
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+ MaxFlatWgrpSize = *(FlatWgrpSizeAttr->second );
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+ }
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+
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+ // Start with the max range.
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+ unsigned Min = MinWavesPerEU;
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+ unsigned Max = MaxWavesPerEU;
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+
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+ // If the attribute exists, set them to the value from the attribute.
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+ if (WavesPerEUAttr.has_value ()) {
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+ Min = WavesPerEUAttr->first ;
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+ if (WavesPerEUAttr->second .has_value ())
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+ Max = *(WavesPerEUAttr->second );
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+ }
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+
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+ // Compute the range from flat workgroup size.
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+ auto [MinFromFlatWgrpSize, MaxFromFlatWgrpSize] =
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+ ST.getWavesPerEU (F, std::make_pair (MinFlatWgrpSize, MaxFlatWgrpSize));
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+
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+ // For the lower bound, we have to "tighten" it.
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+ Min = std::max (Min, MinFromFlatWgrpSize);
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+ // For the upper bound, we have to "extend" it.
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+ Max = std::max (Max, MaxFromFlatWgrpSize);
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+
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+ // Clamp the range to the max range.
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+ Min = std::max (Min, MinWavesPerEU);
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+ Max = std::min (Max, MaxWavesPerEU);
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+
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+ // Update the attribute if it is not the max.
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+ if (Min != MinWavesPerEU || Max != MaxWavesPerEU) {
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+ SmallString<10 > Buffer;
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+ raw_svector_ostream OS (Buffer);
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+ OS << Min << ' ,' << Max;
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+ F.addFnAttr (" amdgpu-waves-per-eu" , OS.str ());
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+ }
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+ }
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+ }
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+
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static bool runImpl (Module &M, AnalysisGetter &AG, TargetMachine &TM,
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AMDGPUAttributorOptions Options,
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ThinOrFullLTOPhase LTOPhase) {
@@ -1421,8 +1438,14 @@ static bool runImpl(Module &M, AnalysisGetter &AG, TargetMachine &TM,
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}
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}
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- ChangeStatus Change = A.run ();
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- return Change == ChangeStatus::CHANGED;
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+ bool Changed = A.run () == ChangeStatus::CHANGED;
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+
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+ if (Changed && (LTOPhase == ThinOrFullLTOPhase::None ||
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+ LTOPhase == ThinOrFullLTOPhase::FullLTOPostLink ||
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+ LTOPhase == ThinOrFullLTOPhase::ThinLTOPostLink))
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+ checkWavesPerEU (M, TM);
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+
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+ return Changed;
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}
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class AMDGPUAttributorLegacy : public ModulePass {
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