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[AArch64] Fix variadic tail-calls on ARM64EC
ARM64EC varargs calls expect that x4 = sp at entry, special handling is needed to ensure this with tail calls since they occur after the epilogue and the X4 write happens before.
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7991,11 +7991,22 @@ AArch64TargetLowering::LowerCall(CallLoweringInfo &CLI,
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}
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if (IsVarArg && Subtarget->isWindowsArm64EC()) {
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SDValue ParamPtr = StackPtr;
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if (IsTailCall) {
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const AArch64FrameLowering *TFI =
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MF.getSubtarget<AArch64Subtarget>().getFrameLowering();
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// Create a dummy object at the top of the stack that can be used to get
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// the SP after the epilogue
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int FI = MF.getFrameInfo().CreateFixedObject(1, FPDiff, true);
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ParamPtr = DAG.getFrameIndex(FI, PtrVT);
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}
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// For vararg calls, the Arm64EC ABI requires values in x4 and x5
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// describing the argument list. x4 contains the address of the
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// first stack parameter. x5 contains the size in bytes of all parameters
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// passed on the stack.
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RegsToPass.emplace_back(AArch64::X4, StackPtr);
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RegsToPass.emplace_back(AArch64::X4, ParamPtr);
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RegsToPass.emplace_back(AArch64::X5,
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DAG.getConstant(NumBytes, DL, MVT::i64));
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}

llvm/test/CodeGen/AArch64/vararg-tallcall.ll

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,6 @@
11
; RUN: llc -mtriple=aarch64-windows-msvc %s -o - | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu %s -o - | FileCheck %s
3+
; RUN: llc -mtriple=arm64ec-windows-msvc %s -o - | FileCheck %s --check-prefixes=CHECK-EC
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; RUN: llc -global-isel -global-isel-abort=2 -verify-machineinstrs -mtriple=aarch64-windows-msvc %s -o - | FileCheck %s
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; RUN: llc -global-isel -global-isel-abort=2 -verify-machineinstrs -mtriple=aarch64-linux-gnu %s -o - | FileCheck %s
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@@ -32,3 +33,10 @@ attributes #1 = { noinline optnone "thunk" }
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; CHECK: ldr x9, [x9]
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; CHECK: mov v0.16b, v16.16b
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; CHECK: br x9
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; CHECK-EC: mov v7.16b, v0.16b
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; CHECK-EC: ldr x9, [x0]
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; CHECK-EC: ldr x11, [x9]
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; CHECK-EC: mov v0.16b, v7.16b
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; CHECK-EC: add x4, sp, #64
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; CHECK-EC: add sp, sp, #64
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; CHECK-EC: br x11

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