@@ -2629,7 +2629,7 @@ SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) {
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// Finally, if this value fits in a 5 bit sext field, return it
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if (SignExtend32<5>(MaskVal) == MaskVal)
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- return DAG.getTargetConstant (MaskVal, SDLoc(N), MVT::i32);
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+ return DAG.getSignedTargetConstant (MaskVal, SDLoc(N), MVT::i32);
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return SDValue();
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}
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@@ -2817,7 +2817,7 @@ bool PPCTargetLowering::SelectAddressRegImm(
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int16_t imm = 0;
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if (isIntS16Immediate(N.getOperand(1), imm) &&
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(!EncodingAlignment || isAligned(*EncodingAlignment, imm))) {
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- Disp = DAG.getTargetConstant (imm, dl, N.getValueType());
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+ Disp = DAG.getSignedTargetConstant (imm, dl, N.getValueType());
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if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0))) {
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Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
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fixupFuncForFI(DAG, FI->getIndex(), N.getValueType());
@@ -5181,7 +5181,7 @@ static SDNode *isBLACompatibleAddress(SDValue Op, SelectionDAG &DAG) {
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return nullptr; // Top 6 bits have to be sext of immediate.
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return DAG
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- .getConstant (
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+ .getSignedConstant (
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(int)C->getZExtValue() >> 2, SDLoc(Op),
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DAG.getTargetLoweringInfo().getPointerTy(DAG.getDataLayout()))
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.getNode();
@@ -9358,7 +9358,11 @@ static SDValue getCanonicalConstSplat(uint64_t Val, unsigned SplatSize, EVT VT,
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EVT CanonicalVT = VTys[SplatSize-1];
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// Build a canonical splat for this value.
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- return DAG.getBitcast(ReqVT, DAG.getConstant(Val, dl, CanonicalVT));
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+ // Explicitly truncate APInt here, as this API is used with a mix of
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+ // signed and unsigned values.
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+ return DAG.getBitcast(
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+ ReqVT,
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+ DAG.getConstant(APInt(64, Val).trunc(SplatSize * 8), dl, CanonicalVT));
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}
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/// BuildIntrinsicOp - Return a unary operator intrinsic node with the
@@ -9769,7 +9773,7 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
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// To avoid having these optimizations undone by constant folding,
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// we convert to a pseudo that will be expanded later into one of
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// the above forms.
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- SDValue Elt = DAG.getConstant (SextVal, dl, MVT::i32);
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+ SDValue Elt = DAG.getSignedConstant (SextVal, dl, MVT::i32);
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EVT VT = (SplatSize == 1 ? MVT::v16i8 :
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(SplatSize == 2 ? MVT::v8i16 : MVT::v4i32));
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SDValue EltSize = DAG.getConstant(SplatSize, dl, MVT::i32);
@@ -18964,7 +18968,7 @@ PPC::AddrMode PPCTargetLowering::SelectOptimalAddrMode(const SDNode *Parent,
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(!Align || isAligned(*Align, CNImm))) {
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int32_t Addr = (int32_t)CNImm;
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// Otherwise, break this down into LIS + Disp.
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- Disp = DAG.getTargetConstant ((int16_t)Addr, DL, MVT::i32);
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+ Disp = DAG.getSignedTargetConstant ((int16_t)Addr, DL, MVT::i32);
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Base =
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DAG.getTargetConstant((Addr - (int16_t)Addr) >> 16, DL, MVT::i32);
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uint32_t LIS = CNType == MVT::i32 ? PPC::LIS : PPC::LIS8;
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