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InferAddressSpaces: Replace undef with poison in tests (#130083)
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13 files changed

+64
-48
lines changed

13 files changed

+64
-48
lines changed

‎llvm/test/CodeGen/X86/pr41619.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -21,8 +21,8 @@ bb:
2121
%tmp6 = extractelement <2 x double> %tmp4, i32 1
2222
%tmp7 = bitcast double %tmp6 to i64
2323
%tmp8 = trunc i64 %tmp7 to i32
24-
store i32 %tmp8, ptr undef, align 4
25-
store double %tmp5, ptr undef, align 16
24+
store i32 %tmp8, ptr poison, align 4
25+
store double %tmp5, ptr poison, align 16
2626
ret void
2727
}
2828

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/address-space-id-funcs.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -3,49 +3,49 @@
33

44
define amdgpu_kernel void @is_local_true(ptr addrspace(3) %lptr) {
55
; CHECK-LABEL: @is_local_true(
6-
; CHECK-NEXT: store i32 1, ptr addrspace(1) undef
6+
; CHECK-NEXT: store i32 1, ptr addrspace(1) poison
77
; CHECK-NEXT: ret void
88
;
99
%cast = addrspacecast ptr addrspace(3) %lptr to ptr
1010
%is.shared = call i1 @llvm.amdgcn.is.shared(ptr %cast)
1111
%ext = zext i1 %is.shared to i32
12-
store i32 %ext, ptr addrspace(1) undef
12+
store i32 %ext, ptr addrspace(1) poison
1313
ret void
1414
}
1515

1616
define amdgpu_kernel void @is_local_false(ptr addrspace(1) %gptr) {
1717
; CHECK-LABEL: @is_local_false(
18-
; CHECK-NEXT: store i32 0, ptr addrspace(1) undef
18+
; CHECK-NEXT: store i32 0, ptr addrspace(1) poison
1919
; CHECK-NEXT: ret void
2020
;
2121
%cast = addrspacecast ptr addrspace(1) %gptr to ptr
2222
%is.shared = call i1 @llvm.amdgcn.is.shared(ptr %cast)
2323
%ext = zext i1 %is.shared to i32
24-
store i32 %ext, ptr addrspace(1) undef
24+
store i32 %ext, ptr addrspace(1) poison
2525
ret void
2626
}
2727

2828
define void @is_private_true(ptr addrspace(5) %lptr) {
2929
; CHECK-LABEL: @is_private_true(
30-
; CHECK-NEXT: store i32 1, ptr addrspace(1) undef
30+
; CHECK-NEXT: store i32 1, ptr addrspace(1) poison
3131
; CHECK-NEXT: ret void
3232
;
3333
%cast = addrspacecast ptr addrspace(5) %lptr to ptr
3434
%is.private = call i1 @llvm.amdgcn.is.private(ptr %cast)
3535
%ext = zext i1 %is.private to i32
36-
store i32 %ext, ptr addrspace(1) undef
36+
store i32 %ext, ptr addrspace(1) poison
3737
ret void
3838
}
3939

4040
define void @is_private_false(ptr addrspace(1) %gptr) {
4141
; CHECK-LABEL: @is_private_false(
42-
; CHECK-NEXT: store i32 0, ptr addrspace(1) undef
42+
; CHECK-NEXT: store i32 0, ptr addrspace(1) poison
4343
; CHECK-NEXT: ret void
4444
;
4545
%cast = addrspacecast ptr addrspace(1) %gptr to ptr
4646
%is.private = call i1 @llvm.amdgcn.is.private(ptr %cast)
4747
%ext = zext i1 %is.private to i32
48-
store i32 %ext, ptr addrspace(1) undef
48+
store i32 %ext, ptr addrspace(1) poison
4949
ret void
5050
}
5151

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces -o - %s | FileCheck %s
22

3-
@c0 = addrspace(4) global ptr undef
3+
@c0 = addrspace(4) global ptr poison
44

55
; CHECK-LABEL: @generic_ptr_from_constant
66
; CHECK: addrspacecast ptr %p to ptr addrspace(1)

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22

33
; check that the debug locations are correctly propagated
44

5-
@lds = internal unnamed_addr addrspace(3) global [648 x double] undef, align 8
5+
@lds = internal unnamed_addr addrspace(3) global [648 x double] poison, align 8
66

77
; CHECK-LABEL: @load_global_from_flat(
88
; CHECK-NEXT: %tmp0 = addrspacecast ptr %generic_scalar to ptr addrspace(1), !dbg ![[DEBUG_LOC_TMP0:[0-9]+]]
@@ -140,4 +140,4 @@ attributes #4 = { nounwind readnone speculatable }
140140
!42 = !DILocation(line: 22, column: 1, scope: !37)
141141
!43 = !DILocation(line: 23, column: 1, scope: !37)
142142
!44 = !DILocation(line: 24, column: 1, scope: !37)
143-
!45 = !DILocation(line: 25, column: 1, scope: !37)
143+
!45 = !DILocation(line: 25, column: 1, scope: !37)

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/icmp.ll

Lines changed: 24 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -94,6 +94,14 @@ define i1 @icmp_mismatch_flat_group_private_cmp_undef(ptr addrspace(3) %group.pt
9494
ret i1 %cmp
9595
}
9696

97+
; CHECK-LABEL: @icmp_mismatch_flat_group_private_cmp_poison(
98+
; CHECK: %cmp = icmp eq ptr addrspace(3) %group.ptr.0, poison
99+
define i1 @icmp_mismatch_flat_group_private_cmp_poison(ptr addrspace(3) %group.ptr.0) #0 {
100+
%cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
101+
%cmp = icmp eq ptr %cast0, addrspacecast (ptr addrspace(5) poison to ptr)
102+
ret i1 %cmp
103+
}
104+
97105
@lds0 = internal addrspace(3) global i32 0, align 4
98106
@global0 = internal addrspace(1) global i32 0, align 4
99107

@@ -113,11 +121,11 @@ define i1 @icmp_mismatch_group_global_cmp_gv_gv(ptr addrspace(3) %group.ptr.0) #
113121
ret i1 %cmp
114122
}
115123

116-
; CHECK-LABEL: @icmp_group_flat_cmp_undef(
117-
; CHECK: %cmp = icmp eq ptr addrspace(3) %group.ptr.0, undef
118-
define i1 @icmp_group_flat_cmp_undef(ptr addrspace(3) %group.ptr.0) #0 {
124+
; CHECK-LABEL: @icmp_group_flat_cmp_poison(
125+
; CHECK: %cmp = icmp eq ptr addrspace(3) %group.ptr.0, poison
126+
define i1 @icmp_group_flat_cmp_poison(ptr addrspace(3) %group.ptr.0) #0 {
119127
%cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
120-
%cmp = icmp eq ptr %cast0, undef
128+
%cmp = icmp eq ptr %cast0, poison
121129
ret i1 %cmp
122130
}
123131

@@ -131,6 +139,14 @@ define i1 @icmp_mismatch_flat_group_private_cmp_null_swap(ptr addrspace(3) %grou
131139
ret i1 %cmp
132140
}
133141

142+
; CHECK-LABEL: @icmp_group_flat_cmp_poison_swap(
143+
; CHECK: %cmp = icmp eq ptr addrspace(3) poison, %group.ptr.0
144+
define i1 @icmp_group_flat_cmp_poison_swap(ptr addrspace(3) %group.ptr.0) #0 {
145+
%cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
146+
%cmp = icmp eq ptr poison, %cast0
147+
ret i1 %cmp
148+
}
149+
134150
; CHECK-LABEL: @icmp_group_flat_cmp_undef_swap(
135151
; CHECK: %cmp = icmp eq ptr addrspace(3) undef, %group.ptr.0
136152
define i1 @icmp_group_flat_cmp_undef_swap(ptr addrspace(3) %group.ptr.0) #0 {
@@ -139,11 +155,11 @@ define i1 @icmp_group_flat_cmp_undef_swap(ptr addrspace(3) %group.ptr.0) #0 {
139155
ret i1 %cmp
140156
}
141157

142-
; CHECK-LABEL: @icmp_mismatch_flat_group_private_cmp_undef_swap(
143-
; CHECK: %cmp = icmp eq ptr addrspace(3) undef, %group.ptr.0
144-
define i1 @icmp_mismatch_flat_group_private_cmp_undef_swap(ptr addrspace(3) %group.ptr.0) #0 {
158+
; CHECK-LABEL: @icmp_mismatch_flat_group_private_cmp_poison_swap(
159+
; CHECK: %cmp = icmp eq ptr addrspace(3) poison, %group.ptr.0
160+
define i1 @icmp_mismatch_flat_group_private_cmp_poison_swap(ptr addrspace(3) %group.ptr.0) #0 {
145161
%cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
146-
%cmp = icmp eq ptr addrspacecast (ptr addrspace(5) undef to ptr), %cast0
162+
%cmp = icmp eq ptr addrspacecast (ptr addrspace(5) poison to ptr), %cast0
147163
ret i1 %cmp
148164
}
149165

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-address-space.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -193,14 +193,14 @@ define void @select_bug() #0 {
193193
; CHECK-SAME: ) #[[ATTR0]] {
194194
; CHECK-NEXT: [[CMP:%.*]] = icmp ne ptr inttoptr (i64 4873 to ptr), null
195195
; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i64 73, i64 93
196-
; CHECK-NEXT: [[ADD_PTR157:%.*]] = getelementptr inbounds i64, ptr undef, i64 [[SEL]]
197-
; CHECK-NEXT: [[CMP169:%.*]] = icmp uge ptr undef, [[ADD_PTR157]]
196+
; CHECK-NEXT: [[ADD_PTR157:%.*]] = getelementptr inbounds i64, ptr poison, i64 [[SEL]]
197+
; CHECK-NEXT: [[CMP169:%.*]] = icmp uge ptr poison, [[ADD_PTR157]]
198198
; CHECK-NEXT: unreachable
199199
;
200200
%cmp = icmp ne ptr inttoptr (i64 4873 to ptr), null
201201
%sel = select i1 %cmp, i64 73, i64 93
202-
%add.ptr157 = getelementptr inbounds i64, ptr undef, i64 %sel
203-
%cmp169 = icmp uge ptr undef, %add.ptr157
202+
%add.ptr157 = getelementptr inbounds i64, ptr poison, i64 %sel
203+
%cmp169 = icmp uge ptr poison, %add.ptr157
204204
unreachable
205205
}
206206

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-addrspacecast.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -29,25 +29,25 @@ define void @addrspacecast_different_pointee_type(ptr addrspace(3) %ptr) {
2929

3030
; CHECK-LABEL: @addrspacecast_to_memory(
3131
; CHECK: %gep0 = getelementptr i32, ptr addrspace(3) %ptr, i64 9
32-
; CHECK-NEXT: store volatile ptr addrspace(3) %gep0, ptr addrspace(1) undef
32+
; CHECK-NEXT: store volatile ptr addrspace(3) %gep0, ptr addrspace(1) poison
3333
; CHECK-NEXT: ret void
3434
define void @addrspacecast_to_memory(ptr addrspace(3) %ptr) {
3535
%asc0 = addrspacecast ptr addrspace(3) %ptr to ptr
3636
%gep0 = getelementptr i32, ptr %asc0, i64 9
3737
%asc1 = addrspacecast ptr %gep0 to ptr addrspace(3)
38-
store volatile ptr addrspace(3) %asc1, ptr addrspace(1) undef
38+
store volatile ptr addrspace(3) %asc1, ptr addrspace(1) poison
3939
ret void
4040
}
4141

4242
; CHECK-LABEL: @multiuse_addrspacecast_gep_addrspacecast(
4343
; CHECK: %asc0 = addrspacecast ptr addrspace(3) %ptr to ptr
44-
; CHECK-NEXT: store volatile ptr %asc0, ptr addrspace(1) undef
44+
; CHECK-NEXT: store volatile ptr %asc0, ptr addrspace(1) poison
4545
; CHECK-NEXT: %gep0 = getelementptr i32, ptr addrspace(3) %ptr, i64 9
4646
; CHECK-NEXT: store i32 8, ptr addrspace(3) %gep0, align 8
4747
; CHECK-NEXT: ret void
4848
define void @multiuse_addrspacecast_gep_addrspacecast(ptr addrspace(3) %ptr) {
4949
%asc0 = addrspacecast ptr addrspace(3) %ptr to ptr
50-
store volatile ptr %asc0, ptr addrspace(1) undef
50+
store volatile ptr %asc0, ptr addrspace(1) poison
5151
%gep0 = getelementptr i32, ptr %asc0, i64 9
5252
%asc1 = addrspacecast ptr %gep0 to ptr addrspace(3)
5353
store i32 8, ptr addrspace(3) %asc1, align 8

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/infer-getelementptr.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
; Test that pure GetElementPtr instructions not directly connected to
55
; a memory operation are inferred.
66

7-
@lds = internal unnamed_addr addrspace(3) global [648 x double] undef, align 8
7+
@lds = internal unnamed_addr addrspace(3) global [648 x double] poison, align 8
88

99
define void @simplified_constexpr_gep_addrspacecast(i64 %idx0, i64 %idx1) {
1010
; CHECK-LABEL: @simplified_constexpr_gep_addrspacecast(

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/insert-pos-assert.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -35,24 +35,24 @@ define i32 @addrspacecast_insert_pos_assert() {
3535
define void @bitcast_insert_pos_assert_1() {
3636
; CHECK-LABEL: @bitcast_insert_pos_assert_1(
3737
; CHECK-NEXT: bb.0:
38-
; CHECK-NEXT: [[ASC0:%.*]] = addrspacecast ptr addrspace(5) undef to ptr
38+
; CHECK-NEXT: [[ASC0:%.*]] = addrspacecast ptr addrspace(5) poison to ptr
3939
; CHECK-NEXT: [[PTI0:%.*]] = ptrtoint ptr [[ASC0]] to i64
4040
; CHECK-NEXT: br label [[BB_1:%.*]]
4141
; CHECK: bb.1:
42-
; CHECK-NEXT: br i1 undef, label [[BB_2:%.*]], label [[BB_3:%.*]]
42+
; CHECK-NEXT: br i1 poison, label [[BB_2:%.*]], label [[BB_3:%.*]]
4343
; CHECK: bb.2:
44-
; CHECK-NEXT: [[LOAD0:%.*]] = load ptr, ptr addrspace(5) undef, align 8
44+
; CHECK-NEXT: [[LOAD0:%.*]] = load ptr, ptr addrspace(5) poison, align 8
4545
; CHECK-NEXT: br label [[BB_3]]
4646
; CHECK: bb.3:
4747
; CHECK-NEXT: ret void
4848
;
4949
bb.0:
50-
%asc0 = addrspacecast ptr addrspace(5) undef to ptr
50+
%asc0 = addrspacecast ptr addrspace(5) poison to ptr
5151
%pti0 = ptrtoint ptr %asc0 to i64
5252
br label %bb.1
5353

5454
bb.1:
55-
br i1 undef, label %bb.2, label %bb.3
55+
br i1 poison, label %bb.2, label %bb.3
5656

5757
bb.2:
5858
%pti1 = ptrtoint ptr %asc0 to i64

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@ entry:
125125
%tmp12 = icmp eq i32 %tmp9, 0
126126
%tmp13 = select i1 %tmp12, i32 32, i32 %tmp9
127127
%tmp14 = getelementptr inbounds i32, ptr %tmp4, i64 %tmp6
128-
%tmp15 = insertelement <2 x i32> undef, i32 %tmp11, i32 0
128+
%tmp15 = insertelement <2 x i32> poison, i32 %tmp11, i32 0
129129
%tmp16 = insertelement <2 x i32> %tmp15, i32 %tmp13, i32 1
130130
store <2 x i32> %tmp16, ptr %tmp14, align 4
131131
ret void

‎llvm/test/Transforms/InferAddressSpaces/AMDGPU/select.ll

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -74,22 +74,22 @@ define amdgpu_kernel void @store_select_group_flat_null_swap(i1 %c, ptr addrspac
7474
ret void
7575
}
7676

77-
; CHECK-LABEL: @store_select_group_flat_undef(
78-
; CHECK: %select = select i1 %c, ptr addrspace(3) %group.ptr.0, ptr addrspace(3) undef
77+
; CHECK-LABEL: @store_select_group_flat_poison(
78+
; CHECK: %select = select i1 %c, ptr addrspace(3) %group.ptr.0, ptr addrspace(3) poison
7979
; CHECK: store i32 -1, ptr addrspace(3) %select
80-
define amdgpu_kernel void @store_select_group_flat_undef(i1 %c, ptr addrspace(3) %group.ptr.0) #0 {
80+
define amdgpu_kernel void @store_select_group_flat_poison(i1 %c, ptr addrspace(3) %group.ptr.0) #0 {
8181
%cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
82-
%select = select i1 %c, ptr %cast0, ptr undef
82+
%select = select i1 %c, ptr %cast0, ptr poison
8383
store i32 -1, ptr %select
8484
ret void
8585
}
8686

87-
; CHECK-LABEL: @store_select_group_flat_undef_swap(
88-
; CHECK: %select = select i1 %c, ptr addrspace(3) undef, ptr addrspace(3) %group.ptr.0
87+
; CHECK-LABEL: @store_select_group_flat_poison_swap(
88+
; CHECK: %select = select i1 %c, ptr addrspace(3) poison, ptr addrspace(3) %group.ptr.0
8989
; CHECK: store i32 -1, ptr addrspace(3) %select
90-
define amdgpu_kernel void @store_select_group_flat_undef_swap(i1 %c, ptr addrspace(3) %group.ptr.0) #0 {
90+
define amdgpu_kernel void @store_select_group_flat_poison_swap(i1 %c, ptr addrspace(3) %group.ptr.0) #0 {
9191
%cast0 = addrspacecast ptr addrspace(3) %group.ptr.0 to ptr
92-
%select = select i1 %c, ptr undef, ptr %cast0
92+
%select = select i1 %c, ptr poison, ptr %cast0
9393
store i32 -1, ptr %select
9494
ret void
9595
}

‎llvm/test/Transforms/InferAddressSpaces/NVPTX/bug31948.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
55

66
%struct.bar = type { float, ptr }
77

8-
@var1 = local_unnamed_addr addrspace(3) externally_initialized global %struct.bar undef, align 8
8+
@var1 = local_unnamed_addr addrspace(3) externally_initialized global %struct.bar poison, align 8
99

1010
define void @bug31948(float %a, ptr nocapture readnone %x, ptr nocapture readnone %y) local_unnamed_addr #0 {
1111
; CHECK-LABEL: define void @bug31948(

‎llvm/test/Transforms/InferAddressSpaces/NVPTX/clone_constexpr.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@ define void @foo() local_unnamed_addr #0 {
1313
; CHECK-NEXT: [[X0:%.*]] = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() #[[ATTR2:[0-9]+]]
1414
; CHECK-NEXT: [[IDXPROM_I:%.*]] = zext i32 [[X0]] to i64
1515
; CHECK-NEXT: [[ARRAYIDX_I:%.*]] = getelementptr [[STRUCT_S:%.*]], ptr addrspacecast (ptr addrspace(3) @g1 to ptr), i64 0, i32 0, i64 [[IDXPROM_I]]
16-
; CHECK-NEXT: tail call void @f1(ptr [[ARRAYIDX_I]], i32 undef) #[[ATTR0:[0-9]+]]
16+
; CHECK-NEXT: tail call void @f1(ptr [[ARRAYIDX_I]], i32 poison) #[[ATTR0:[0-9]+]]
1717
; CHECK-NEXT: [[X1:%.*]] = load i32, ptr addrspace(3) @g1, align 4
1818
; CHECK-NEXT: [[L_SROA_0_0_INSERT_EXT_I:%.*]] = zext i32 [[X1]] to i64
1919
; CHECK-NEXT: tail call void @f2(ptr null, i64 [[L_SROA_0_0_INSERT_EXT_I]]) #[[ATTR0]]
@@ -23,7 +23,7 @@ entry:
2323
%x0 = tail call i32 @llvm.nvvm.read.ptx.sreg.tid.x() #2
2424
%idxprom.i = zext i32 %x0 to i64
2525
%arrayidx.i = getelementptr %struct.S, ptr addrspacecast (ptr addrspace(3) @g1 to ptr), i64 0, i32 0, i64 %idxprom.i
26-
tail call void @f1(ptr %arrayidx.i, i32 undef) #0
26+
tail call void @f1(ptr %arrayidx.i, i32 poison) #0
2727
%x1 = load i32, ptr addrspacecast (ptr addrspace(3) @g1 to ptr), align 4
2828
%L.sroa.0.0.insert.ext.i = zext i32 %x1 to i64
2929
tail call void @f2(ptr null, i64 %L.sroa.0.0.insert.ext.i) #0
@@ -36,7 +36,7 @@ declare i32 @llvm.nvvm.read.ptx.sreg.tid.x() #1
3636

3737
; Make sure we can clone GEP which uses complex constant expressions as indices.
3838
; https://bugs.llvm.org/show_bug.cgi?id=51099
39-
@g2 = internal addrspace(3) global [128 x i8] undef, align 1
39+
@g2 = internal addrspace(3) global [128 x i8] poison, align 1
4040

4141
define float @complex_ce(ptr nocapture readnone %a, ptr nocapture readnone %b, ptr nocapture readnone %c) local_unnamed_addr #0 {
4242
; CHECK-LABEL: @complex_ce(

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