@@ -118,8 +118,8 @@ define i32 @icmp_div(i16 %a, i16 %c) {
118
118
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[A:%.*]], 0
119
119
; CHECK-NEXT: br i1 [[TOBOOL]], label [[THEN:%.*]], label [[EXIT:%.*]]
120
120
; CHECK: then:
121
- ; CHECK-NEXT: [[CMP :%.*]] = icmp eq i16 [[C:%.*]], 0
122
- ; CHECK-NEXT: [[TMP0:%.*]] = sext i1 [[CMP ]] to i32
121
+ ; CHECK-NEXT: [[CMP_NOT :%.*]] = icmp eq i16 [[C:%.*]], 0
122
+ ; CHECK-NEXT: [[TMP0:%.*]] = sext i1 [[CMP_NOT ]] to i32
123
123
; CHECK-NEXT: br label [[EXIT]]
124
124
; CHECK: exit:
125
125
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[TMP0]], [[THEN]] ]
@@ -173,8 +173,8 @@ define i32 @icmp_div3(i16 %a, i16 %c) {
173
173
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i16 [[A:%.*]], 0
174
174
; CHECK-NEXT: br i1 [[TOBOOL]], label [[THEN:%.*]], label [[EXIT:%.*]]
175
175
; CHECK: then:
176
- ; CHECK-NEXT: [[CMP :%.*]] = icmp eq i16 [[C:%.*]], 0
177
- ; CHECK-NEXT: [[TMP0:%.*]] = sext i1 [[CMP ]] to i32
176
+ ; CHECK-NEXT: [[CMP_NOT :%.*]] = icmp eq i16 [[C:%.*]], 0
177
+ ; CHECK-NEXT: [[TMP0:%.*]] = sext i1 [[CMP_NOT ]] to i32
178
178
; CHECK-NEXT: br label [[EXIT]]
179
179
; CHECK: exit:
180
180
; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ -1, [[ENTRY:%.*]] ], [ [[TMP0]], [[THEN]] ]
@@ -381,8 +381,8 @@ define i1 @sdiv_eq_smin_use(i32 %x, i32 %y) {
381
381
382
382
define i1 @sdiv_x_by_const_cmp_x (i32 %x ) {
383
383
; CHECK-LABEL: @sdiv_x_by_const_cmp_x(
384
- ; CHECK-NEXT: [[TMP1 :%.*]] = icmp eq i32 [[X:%.*]], 0
385
- ; CHECK-NEXT: ret i1 [[TMP1 ]]
384
+ ; CHECK-NEXT: [[R :%.*]] = icmp eq i32 [[X:%.*]], 0
385
+ ; CHECK-NEXT: ret i1 [[R ]]
386
386
;
387
387
%v = sdiv i32 %x , 13
388
388
%r = icmp eq i32 %v , %x
@@ -399,12 +399,35 @@ define i1 @udiv_x_by_const_cmp_x(i32 %x) {
399
399
ret i1 %2
400
400
}
401
401
402
+ define <2 x i1 > @udiv_x_by_const_cmp_x_non_splat (<2 x i32 > %x ) {
403
+ ; CHECK-LABEL: @udiv_x_by_const_cmp_x_non_splat(
404
+ ; CHECK-NEXT: [[TMP1:%.*]] = udiv <2 x i32> [[X:%.*]], <i32 123, i32 -123>
405
+ ; CHECK-NEXT: [[TMP2:%.*]] = icmp slt <2 x i32> [[TMP1]], [[X]]
406
+ ; CHECK-NEXT: ret <2 x i1> [[TMP2]]
407
+ ;
408
+ %1 = udiv <2 x i32 > %x , <i32 123 , i32 -123 >
409
+ %2 = icmp slt <2 x i32 > %1 , %x
410
+ ret <2 x i1 > %2
411
+ }
412
+
413
+
414
+ define <2 x i1 > @sdiv_x_by_const_cmp_x_non_splat (<2 x i32 > %x ) {
415
+ ; CHECK-LABEL: @sdiv_x_by_const_cmp_x_non_splat(
416
+ ; CHECK-NEXT: [[TMP1:%.*]] = sdiv <2 x i32> [[X:%.*]], <i32 2, i32 3>
417
+ ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <2 x i32> [[TMP1]], [[X]]
418
+ ; CHECK-NEXT: ret <2 x i1> [[TMP2]]
419
+ ;
420
+ %1 = sdiv <2 x i32 > %x , <i32 2 , i32 3 >
421
+ %2 = icmp eq <2 x i32 > %1 , %x
422
+ ret <2 x i1 > %2
423
+ }
424
+
402
425
; Same as above but with right shift instead of division (C != 0)
403
426
404
427
define i1 @lshr_x_by_const_cmp_x (i32 %x ) {
405
428
; CHECK-LABEL: @lshr_x_by_const_cmp_x(
406
- ; CHECK-NEXT: [[TMP1 :%.*]] = icmp eq i32 [[X:%.*]], 0
407
- ; CHECK-NEXT: ret i1 [[TMP1 ]]
429
+ ; CHECK-NEXT: [[R :%.*]] = icmp eq i32 [[X:%.*]], 0
430
+ ; CHECK-NEXT: ret i1 [[R ]]
408
431
;
409
432
%v = lshr i32 %x , 1
410
433
%r = icmp eq i32 %v , %x
@@ -421,6 +444,30 @@ define <4 x i1> @lshr_by_const_cmp_sle_value(<4 x i32> %x) {
421
444
ret <4 x i1 > %r
422
445
}
423
446
447
+ define <4 x i1 > @lshr_by_const_cmp_sle_value_non_splat (<4 x i32 > %x ) {
448
+ ; CHECK-LABEL: @lshr_by_const_cmp_sle_value_non_splat(
449
+ ; CHECK-NEXT: [[V:%.*]] = lshr <4 x i32> [[X:%.*]], <i32 3, i32 3, i32 3, i32 5>
450
+ ; CHECK-NEXT: [[R:%.*]] = icmp sle <4 x i32> [[V]], [[X]]
451
+ ; CHECK-NEXT: ret <4 x i1> [[R]]
452
+ ;
453
+ %v = lshr <4 x i32 > %x , <i32 3 , i32 3 , i32 3 , i32 5 >
454
+ %r = icmp sle <4 x i32 > %v , %x
455
+ ret <4 x i1 > %r
456
+ }
457
+
458
+
459
+ define <4 x i1 > @ashr_by_const_cmp_sge_value_non_splat (<4 x i32 > %x ) {
460
+ ; CHECK-LABEL: @ashr_by_const_cmp_sge_value_non_splat(
461
+ ; CHECK-NEXT: [[V:%.*]] = ashr <4 x i32> [[X:%.*]], <i32 1, i32 2, i32 3, i32 4>
462
+ ; CHECK-NEXT: [[R:%.*]] = icmp sge <4 x i32> [[V]], [[X]]
463
+ ; CHECK-NEXT: ret <4 x i1> [[R]]
464
+ ;
465
+ %v = ashr <4 x i32 > %x , <i32 1 , i32 2 , i32 3 , i32 4 >
466
+ %r = icmp sge <4 x i32 > %v , %x
467
+ ret <4 x i1 > %r
468
+ }
469
+
470
+
424
471
define i1 @lshr_by_const_cmp_sge_value (i32 %x ) {
425
472
; CHECK-LABEL: @lshr_by_const_cmp_sge_value(
426
473
; CHECK-NEXT: [[R:%.*]] = icmp slt i32 [[X:%.*]], 1
0 commit comments