@@ -481,7 +481,7 @@ define void @test10(ptr %X) nounwind ssp {
481
481
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], [[FOR_INC10:%.*]] ], [ 0, [[ENTRY:%.*]] ]
482
482
; CHECK-NEXT: [[I_04:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC12:%.*]], [[FOR_INC10]] ]
483
483
; CHECK-NEXT: [[TMP0:%.*]] = mul nuw nsw i64 [[INDVAR]], 100
484
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[X]], i64 [[TMP0]]
484
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[X]], i64 [[TMP0]]
485
485
; CHECK-NEXT: br label [[FOR_BODY5:%.*]]
486
486
; CHECK: for.body5:
487
487
; CHECK-NEXT: [[J_02:%.*]] = phi i32 [ 0, [[BB_NPH]] ], [ [[INC:%.*]], [[FOR_BODY5]] ]
@@ -682,13 +682,13 @@ define void @PR14241(ptr %s, i64 %size) {
682
682
; CHECK-NEXT: entry:
683
683
; CHECK-NEXT: [[END_IDX:%.*]] = add i64 [[SIZE:%.*]], -1
684
684
; CHECK-NEXT: [[END_PTR:%.*]] = getelementptr inbounds i32, ptr [[S:%.*]], i64 [[END_IDX]]
685
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[S]], i64 4
685
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[S]], i64 4
686
686
; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[SIZE]], 2
687
687
; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], -8
688
688
; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 2
689
689
; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i64 [[TMP2]], 2
690
690
; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP3]], 4
691
- ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 4 [[S]], ptr align 4 [[UGLYGEP ]], i64 [[TMP4]], i1 false)
691
+ ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 4 [[S]], ptr align 4 [[SCEVGEP ]], i64 [[TMP4]], i1 false)
692
692
; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
693
693
; CHECK: while.body:
694
694
; CHECK-NEXT: [[PHI_PTR:%.*]] = phi ptr [ [[S]], [[ENTRY:%.*]] ], [ [[NEXT_PTR:%.*]], [[WHILE_BODY]] ]
@@ -800,11 +800,11 @@ define noalias ptr @test17(ptr nocapture readonly %a, i32 %c) {
800
800
; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[TMP0]] to i64
801
801
; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[TMP3]], 2
802
802
; CHECK-NEXT: [[TMP5:%.*]] = sub i64 [[TMP2]], [[TMP4]]
803
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[CALL]], i64 [[TMP5]]
804
- ; CHECK-NEXT: [[UGLYGEP1 :%.*]] = getelementptr i8, ptr [[A:%.*]], i64 [[TMP5]]
803
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[CALL]], i64 [[TMP5]]
804
+ ; CHECK-NEXT: [[SCEVGEP1 :%.*]] = getelementptr i8, ptr [[A:%.*]], i64 [[TMP5]]
805
805
; CHECK-NEXT: [[TMP6:%.*]] = zext i32 [[C]] to i64
806
806
; CHECK-NEXT: [[TMP7:%.*]] = shl nuw nsw i64 [[TMP6]], 2
807
- ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[UGLYGEP ]], ptr align 4 [[UGLYGEP1 ]], i64 [[TMP7]], i1 false)
807
+ ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[SCEVGEP ]], ptr align 4 [[SCEVGEP1 ]], i64 [[TMP7]], i1 false)
808
808
; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
809
809
; CHECK: while.body:
810
810
; CHECK-NEXT: [[DEC10_IN:%.*]] = phi i32 [ [[DEC10:%.*]], [[WHILE_BODY]] ], [ [[C]], [[WHILE_BODY_PREHEADER]] ]
@@ -900,7 +900,7 @@ define void @test19(ptr nocapture %X) {
900
900
; CHECK-NEXT: [[I_06:%.*]] = phi i32 [ 99, [[ENTRY]] ], [ [[DEC5:%.*]], [[FOR_INC4]] ]
901
901
; CHECK-NEXT: [[TMP0:%.*]] = mul nsw i64 [[INDVAR]], -100
902
902
; CHECK-NEXT: [[TMP1:%.*]] = add i64 [[TMP0]], 9900
903
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[X]], i64 [[TMP1]]
903
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[X]], i64 [[TMP1]]
904
904
; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[I_06]], 100
905
905
; CHECK-NEXT: br label [[FOR_BODY3:%.*]]
906
906
; CHECK: for.body3:
@@ -1048,8 +1048,8 @@ exit:
1048
1048
define void @PR46179_positive_stride (ptr %Src , i64 %Size ) {
1049
1049
; CHECK-LABEL: @PR46179_positive_stride(
1050
1050
; CHECK-NEXT: bb.nph:
1051
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 1
1052
- ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[SRC]], ptr align 1 [[UGLYGEP ]], i64 [[SIZE:%.*]], i1 false)
1051
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 1
1052
+ ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[SRC]], ptr align 1 [[SCEVGEP ]], i64 [[SIZE:%.*]], i1 false)
1053
1053
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1054
1054
; CHECK: for.body:
1055
1055
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
@@ -1087,8 +1087,8 @@ declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias
1087
1087
define void @loop_with_memcpy_PR46179_positive_stride (ptr %Src , i64 %Size ) {
1088
1088
; CHECK-LABEL: @loop_with_memcpy_PR46179_positive_stride(
1089
1089
; CHECK-NEXT: bb.nph:
1090
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 1
1091
- ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[SRC]], ptr align 1 [[UGLYGEP ]], i64 [[SIZE:%.*]], i1 false)
1090
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 1
1091
+ ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[SRC]], ptr align 1 [[SCEVGEP ]], i64 [[SIZE:%.*]], i1 false)
1092
1092
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1093
1093
; CHECK: for.body:
1094
1094
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
@@ -1125,8 +1125,8 @@ define void @PR46179_negative_stride(ptr %Src, i64 %Size) {
1125
1125
; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i64 [[SIZE:%.*]], 0
1126
1126
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
1127
1127
; CHECK: for.body.preheader:
1128
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 1
1129
- ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[UGLYGEP ]], ptr align 1 [[SRC]], i64 [[SIZE]], i1 false)
1128
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 1
1129
+ ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[SCEVGEP ]], ptr align 1 [[SRC]], i64 [[SIZE]], i1 false)
1130
1130
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1131
1131
; CHECK: for.body:
1132
1132
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[STEP:%.*]], [[FOR_BODY]] ], [ [[SIZE]], [[FOR_BODY_PREHEADER]] ]
@@ -1166,8 +1166,8 @@ define void @loop_with_memcpy_PR46179_negative_stride(ptr %Src, i64 %Size) {
1166
1166
; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i64 [[SIZE:%.*]], 0
1167
1167
; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
1168
1168
; CHECK: for.body.preheader:
1169
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 1
1170
- ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[UGLYGEP ]], ptr align 1 [[SRC]], i64 [[SIZE]], i1 false)
1169
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 1
1170
+ ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[SCEVGEP ]], ptr align 1 [[SRC]], i64 [[SIZE]], i1 false)
1171
1171
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1172
1172
; CHECK: for.body:
1173
1173
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[STEP:%.*]], [[FOR_BODY]] ], [ [[SIZE]], [[FOR_BODY_PREHEADER]] ]
@@ -1202,13 +1202,13 @@ for.end: ; preds = %.for.body, %bb.nph
1202
1202
define void @loop_with_memcpy_stride16 (ptr %Src , i64 %Size ) {
1203
1203
; CHECK-LABEL: @loop_with_memcpy_stride16(
1204
1204
; CHECK-NEXT: bb.nph:
1205
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 16
1205
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 16
1206
1206
; CHECK-NEXT: [[SMAX:%.*]] = call i64 @llvm.smax.i64(i64 [[SIZE:%.*]], i64 16)
1207
1207
; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[SMAX]], -1
1208
1208
; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 4
1209
1209
; CHECK-NEXT: [[TMP2:%.*]] = shl nuw nsw i64 [[TMP1]], 4
1210
1210
; CHECK-NEXT: [[TMP3:%.*]] = add nuw i64 [[TMP2]], 16
1211
- ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[SRC]], ptr align 1 [[UGLYGEP ]], i64 [[TMP3]], i1 false)
1211
+ ; CHECK-NEXT: call void @llvm.memmove.p0.p0.i64(ptr align 1 [[SRC]], ptr align 1 [[SCEVGEP ]], i64 [[TMP3]], i1 false)
1212
1212
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1213
1213
; CHECK: for.body:
1214
1214
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[STEP:%.*]], [[FOR_BODY]] ], [ 0, [[BB_NPH:%.*]] ]
@@ -1550,8 +1550,8 @@ loop:
1550
1550
define void @prefer_memcpy_over_memmove (ptr noalias %Src , ptr noalias %Dest , i64 %Size ) {
1551
1551
; CHECK-LABEL: @prefer_memcpy_over_memmove(
1552
1552
; CHECK-NEXT: bb.nph:
1553
- ; CHECK-NEXT: [[UGLYGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 42
1554
- ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[DEST:%.*]], ptr align 1 [[UGLYGEP ]], i64 [[SIZE:%.*]], i1 false)
1553
+ ; CHECK-NEXT: [[SCEVGEP :%.*]] = getelementptr i8, ptr [[SRC:%.*]], i64 42
1554
+ ; CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[DEST:%.*]], ptr align 1 [[SCEVGEP ]], i64 [[SIZE:%.*]], i1 false)
1555
1555
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
1556
1556
; CHECK: for.body:
1557
1557
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ 0, [[BB_NPH:%.*]] ], [ [[INDVAR_NEXT:%.*]], [[FOR_BODY]] ]
0 commit comments