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[NFC] using isUndef() instead of getOpcode() == ISD::UNDEF (#127713)
[NFC] using isUndef() instead of getOpcode() == ISD::UNDEF
1 parent 7f69a39 commit 1ac0db4

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3 files changed

+18
-18
lines changed

3 files changed

+18
-18
lines changed

llvm/include/llvm/CodeGen/SelectionDAG.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -873,7 +873,7 @@ class SelectionDAG {
873873
/// for integers, a type wider than) VT's element type.
874874
SDValue getSplatBuildVector(EVT VT, const SDLoc &DL, SDValue Op) {
875875
// VerifySDNode (via InsertNode) checks BUILD_VECTOR later.
876-
if (Op.getOpcode() == ISD::UNDEF) {
876+
if (Op.isUndef()) {
877877
assert((VT.getVectorElementType() == Op.getValueType() ||
878878
(VT.isInteger() &&
879879
VT.getVectorElementType().bitsLE(Op.getValueType()))) &&
@@ -889,7 +889,7 @@ class SelectionDAG {
889889
// Return a splat ISD::SPLAT_VECTOR node, consisting of Op splatted to all
890890
// elements.
891891
SDValue getSplatVector(EVT VT, const SDLoc &DL, SDValue Op) {
892-
if (Op.getOpcode() == ISD::UNDEF) {
892+
if (Op.isUndef()) {
893893
assert((VT.getVectorElementType() == Op.getValueType() ||
894894
(VT.isInteger() &&
895895
VT.getVectorElementType().bitsLE(Op.getValueType()))) &&

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16145,7 +16145,7 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
1614516145
// also recursively replace t184 by t150.
1614616146
SDValue MaybePoisonOperand = N->getOperand(0).getOperand(OpNo);
1614716147
// Don't replace every single UNDEF everywhere with frozen UNDEF, though.
16148-
if (MaybePoisonOperand.getOpcode() == ISD::UNDEF)
16148+
if (MaybePoisonOperand.isUndef())
1614916149
continue;
1615016150
// First, freeze each offending operand.
1615116151
SDValue FrozenMaybePoisonOperand = DAG.getFreeze(MaybePoisonOperand);
@@ -16173,7 +16173,7 @@ SDValue DAGCombiner::visitFREEZE(SDNode *N) {
1617316173
SmallVector<SDValue> Ops(N0->ops());
1617416174
// Special-handle ISD::UNDEF, each single one of them can be it's own thing.
1617516175
for (SDValue &Op : Ops) {
16176-
if (Op.getOpcode() == ISD::UNDEF)
16176+
if (Op.isUndef())
1617716177
Op = DAG.getFreeze(Op);
1617816178
}
1617916179

@@ -24289,7 +24289,7 @@ static SDValue combineConcatVectorOfScalars(SDNode *N, SelectionDAG &DAG) {
2428924289
if (ISD::BITCAST == Op.getOpcode() &&
2429024290
!Op.getOperand(0).getValueType().isVector())
2429124291
Ops.push_back(Op.getOperand(0));
24292-
else if (ISD::UNDEF == Op.getOpcode())
24292+
else if (Op.isUndef())
2429324293
Ops.push_back(DAG.getNode(ISD::UNDEF, DL, SVT));
2429424294
else
2429524295
return SDValue();
@@ -24684,7 +24684,7 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
2468424684
// fold (concat_vectors (BUILD_VECTOR A, B, ...), (BUILD_VECTOR C, D, ...))
2468524685
// -> (BUILD_VECTOR A, B, ..., C, D, ...)
2468624686
auto IsBuildVectorOrUndef = [](const SDValue &Op) {
24687-
return ISD::UNDEF == Op.getOpcode() || ISD::BUILD_VECTOR == Op.getOpcode();
24687+
return Op.isUndef() || ISD::BUILD_VECTOR == Op.getOpcode();
2468824688
};
2468924689
if (llvm::all_of(N->ops(), IsBuildVectorOrUndef)) {
2469024690
SmallVector<SDValue, 8> Opnds;
@@ -24708,7 +24708,7 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) {
2470824708
EVT OpVT = Op.getValueType();
2470924709
unsigned NumElts = OpVT.getVectorNumElements();
2471024710

24711-
if (ISD::UNDEF == Op.getOpcode())
24711+
if (Op.isUndef())
2471224712
Opnds.append(NumElts, DAG.getUNDEF(MinVT));
2471324713

2471424714
if (ISD::BUILD_VECTOR == Op.getOpcode()) {

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -6285,7 +6285,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
62856285
Flags.setNonNeg(N1->getFlags().hasNonNeg());
62866286
return getNode(OpOpcode, DL, VT, N1.getOperand(0), Flags);
62876287
}
6288-
if (OpOpcode == ISD::UNDEF)
6288+
if (N1.isUndef())
62896289
// sext(undef) = 0, because the top bits will all be the same.
62906290
return getConstant(0, DL, VT);
62916291
break;
@@ -6305,7 +6305,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
63056305
Flags.setNonNeg(N1->getFlags().hasNonNeg());
63066306
return getNode(ISD::ZERO_EXTEND, DL, VT, N1.getOperand(0), Flags);
63076307
}
6308-
if (OpOpcode == ISD::UNDEF)
6308+
if (N1.isUndef())
63096309
// zext(undef) = 0, because the top bits will be zero.
63106310
return getConstant(0, DL, VT);
63116311

@@ -6347,7 +6347,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
63476347
// (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
63486348
return getNode(OpOpcode, DL, VT, N1.getOperand(0), Flags);
63496349
}
6350-
if (OpOpcode == ISD::UNDEF)
6350+
if (N1.isUndef())
63516351
return getUNDEF(VT);
63526352

63536353
// (ext (trunc x)) -> x
@@ -6382,7 +6382,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
63826382
return getNode(ISD::TRUNCATE, DL, VT, N1.getOperand(0));
63836383
return N1.getOperand(0);
63846384
}
6385-
if (OpOpcode == ISD::UNDEF)
6385+
if (N1.isUndef())
63866386
return getUNDEF(VT);
63876387
if (OpOpcode == ISD::VSCALE && !NewNodesMustHaveLegalTypes)
63886388
return getVScale(DL, VT,
@@ -6400,22 +6400,22 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64006400
break;
64016401
case ISD::ABS:
64026402
assert(VT.isInteger() && VT == N1.getValueType() && "Invalid ABS!");
6403-
if (OpOpcode == ISD::UNDEF)
6403+
if (N1.isUndef())
64046404
return getConstant(0, DL, VT);
64056405
break;
64066406
case ISD::BSWAP:
64076407
assert(VT.isInteger() && VT == N1.getValueType() && "Invalid BSWAP!");
64086408
assert((VT.getScalarSizeInBits() % 16 == 0) &&
64096409
"BSWAP types must be a multiple of 16 bits!");
6410-
if (OpOpcode == ISD::UNDEF)
6410+
if (N1.isUndef())
64116411
return getUNDEF(VT);
64126412
// bswap(bswap(X)) -> X.
64136413
if (OpOpcode == ISD::BSWAP)
64146414
return N1.getOperand(0);
64156415
break;
64166416
case ISD::BITREVERSE:
64176417
assert(VT.isInteger() && VT == N1.getValueType() && "Invalid BITREVERSE!");
6418-
if (OpOpcode == ISD::UNDEF)
6418+
if (N1.isUndef())
64196419
return getUNDEF(VT);
64206420
break;
64216421
case ISD::BITCAST:
@@ -6424,7 +6424,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64246424
if (VT == N1.getValueType()) return N1; // noop conversion.
64256425
if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
64266426
return getNode(ISD::BITCAST, DL, VT, N1.getOperand(0));
6427-
if (OpOpcode == ISD::UNDEF)
6427+
if (N1.isUndef())
64286428
return getUNDEF(VT);
64296429
break;
64306430
case ISD::SCALAR_TO_VECTOR:
@@ -6434,7 +6434,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64346434
N1.getValueType().isInteger() &&
64356435
VT.getVectorElementType().bitsLE(N1.getValueType()))) &&
64366436
"Illegal SCALAR_TO_VECTOR node!");
6437-
if (OpOpcode == ISD::UNDEF)
6437+
if (N1.isUndef())
64386438
return getUNDEF(VT);
64396439
// scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
64406440
if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
@@ -6445,7 +6445,7 @@ SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
64456445
break;
64466446
case ISD::FNEG:
64476447
// Negation of an unknown bag of bits is still completely undefined.
6448-
if (OpOpcode == ISD::UNDEF)
6448+
if (N1.isUndef())
64496449
return getUNDEF(VT);
64506450

64516451
if (OpOpcode == ISD::FNEG) // --X -> X
@@ -13364,7 +13364,7 @@ void BuildVectorSDNode::recastRawBits(bool IsLittleEndian,
1336413364
bool BuildVectorSDNode::isConstant() const {
1336513365
for (const SDValue &Op : op_values()) {
1336613366
unsigned Opc = Op.getOpcode();
13367-
if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
13367+
if (!Op.isUndef() && Opc != ISD::Constant && Opc != ISD::ConstantFP)
1336813368
return false;
1336913369
}
1337013370
return true;

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