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KanRobertKanRobert
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[X86] Support EVEX compression for EGPR (#77202)
Compress promoted instruction (EVEX) to pre-promotion instruction (legacy/VEX) when R16-R31 is not used. Alternative of #77065
1 parent 3574b61 commit 1c67466

13 files changed

+53
-43
lines changed

‎llvm/lib/Target/X86/X86CompressEVEX.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -252,8 +252,12 @@ static bool CompressEVEXImpl(MachineInstr &MI, const X86Subtarget &ST) {
252252
if (!performCustomAdjustments(MI, I->NewOpc))
253253
return false;
254254

255-
MI.setDesc(ST.getInstrInfo()->get(I->NewOpc));
256-
MI.setAsmPrinterFlag(X86::AC_EVEX_2_VEX);
255+
const MCInstrDesc &NewDesc = ST.getInstrInfo()->get(I->NewOpc);
256+
MI.setDesc(NewDesc);
257+
uint64_t Encoding = NewDesc.TSFlags & X86II::EncodingMask;
258+
auto AsmComment =
259+
(Encoding == X86II::VEX) ? X86::AC_EVEX_2_VEX : X86::AC_EVEX_2_LEGACY;
260+
MI.setAsmPrinterFlag(AsmComment);
257261
return true;
258262
}
259263

‎llvm/lib/Target/X86/X86InstrInfo.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -29,8 +29,10 @@ class X86Subtarget;
2929
namespace X86 {
3030

3131
enum AsmComments {
32+
// For instr that was compressed from EVEX to LEGACY.
33+
AC_EVEX_2_LEGACY = MachineInstr::TAsmComments,
3234
// For instr that was compressed from EVEX to VEX.
33-
AC_EVEX_2_VEX = MachineInstr::TAsmComments
35+
AC_EVEX_2_VEX = AC_EVEX_2_LEGACY << 1
3436
};
3537

3638
/// Return a pair of condition code for the given predicate and whether

‎llvm/lib/Target/X86/X86MCInstLower.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2055,10 +2055,11 @@ void X86AsmPrinter::emitInstruction(const MachineInstr *MI) {
20552055
}
20562056
}
20572057

2058-
// Add a comment about EVEX-2-VEX compression for AVX-512 instrs that
2059-
// are compressed from EVEX encoding to VEX encoding.
2058+
// Add a comment about EVEX compression
20602059
if (TM.Options.MCOptions.ShowMCEncoding) {
2061-
if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_VEX)
2060+
if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_LEGACY)
2061+
OutStreamer->AddComment("EVEX TO LEGACY Compression ", false);
2062+
else if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_VEX)
20622063
OutStreamer->AddComment("EVEX TO VEX Compression ", false);
20632064
}
20642065

‎llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -29,7 +29,7 @@ define i32 @test_mm_crc32_u8(i32 %a0, i32 %a1) nounwind {
2929
; EGPR-LABEL: test_mm_crc32_u8:
3030
; EGPR: # %bb.0:
3131
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
32-
; EGPR-NEXT: crc32b %sil, %eax # encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xc6]
32+
; EGPR-NEXT: crc32b %sil, %eax # EVEX TO LEGACY Compression encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xc6]
3333
; EGPR-NEXT: retq # encoding: [0xc3]
3434
%trunc = trunc i32 %a1 to i8
3535
%res = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a0, i8 %trunc)
@@ -55,7 +55,7 @@ define i32 @test_mm_crc32_u16(i32 %a0, i32 %a1) nounwind {
5555
; EGPR-LABEL: test_mm_crc32_u16:
5656
; EGPR: # %bb.0:
5757
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
58-
; EGPR-NEXT: crc32w %si, %eax # encoding: [0x62,0xf4,0x7d,0x08,0xf1,0xc6]
58+
; EGPR-NEXT: crc32w %si, %eax # EVEX TO LEGACY Compression encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc6]
5959
; EGPR-NEXT: retq # encoding: [0xc3]
6060
%trunc = trunc i32 %a1 to i16
6161
%res = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a0, i16 %trunc)
@@ -79,7 +79,7 @@ define i32 @test_mm_crc32_u32(i32 %a0, i32 %a1) nounwind {
7979
; EGPR-LABEL: test_mm_crc32_u32:
8080
; EGPR: # %bb.0:
8181
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
82-
; EGPR-NEXT: crc32l %esi, %eax # encoding: [0x62,0xf4,0x7c,0x08,0xf1,0xc6]
82+
; EGPR-NEXT: crc32l %esi, %eax # EVEX TO LEGACY Compression encoding: [0xf2,0x0f,0x38,0xf1,0xc6]
8383
; EGPR-NEXT: retq # encoding: [0xc3]
8484
%res = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a0, i32 %a1)
8585
ret i32 %res

‎llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ define i64 @test_mm_crc64_u8(i64 %a0, i32 %a1) nounwind{
1515
;
1616
; EGPR-LABEL: test_mm_crc64_u8:
1717
; EGPR: # %bb.0:
18-
; EGPR-NEXT: crc32b %sil, %edi # encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xfe]
18+
; EGPR-NEXT: crc32b %sil, %edi # EVEX TO LEGACY Compression encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xfe]
1919
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
2020
; EGPR-NEXT: retq # encoding: [0xc3]
2121
%trunc = trunc i32 %a1 to i8
@@ -34,7 +34,7 @@ define i64 @test_mm_crc64_u64(i64 %a0, i64 %a1) nounwind{
3434
; EGPR-LABEL: test_mm_crc64_u64:
3535
; EGPR: # %bb.0:
3636
; EGPR-NEXT: movq %rdi, %rax # encoding: [0x48,0x89,0xf8]
37-
; EGPR-NEXT: crc32q %rsi, %rax # encoding: [0x62,0xf4,0xfc,0x08,0xf1,0xc6]
37+
; EGPR-NEXT: crc32q %rsi, %rax # EVEX TO LEGACY Compression encoding: [0xf2,0x48,0x0f,0x38,0xf1,0xc6]
3838
; EGPR-NEXT: retq # encoding: [0xc3]
3939
%res = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a0, i64 %a1)
4040
ret i64 %res

‎llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,7 @@ define i32 @crc32_32_8(i32 %a, i8 %b) nounwind {
1919
; EGPR-LABEL: crc32_32_8:
2020
; EGPR: ## %bb.0:
2121
; EGPR-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
22-
; EGPR-NEXT: crc32b %sil, %eax ## encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xc6]
22+
; EGPR-NEXT: crc32b %sil, %eax ## EVEX TO LEGACY Compression encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xc6]
2323
; EGPR-NEXT: retq ## encoding: [0xc3]
2424
%tmp = call i32 @llvm.x86.sse42.crc32.32.8(i32 %a, i8 %b)
2525
ret i32 %tmp
@@ -42,7 +42,7 @@ define i32 @crc32_32_16(i32 %a, i16 %b) nounwind {
4242
; EGPR-LABEL: crc32_32_16:
4343
; EGPR: ## %bb.0:
4444
; EGPR-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
45-
; EGPR-NEXT: crc32w %si, %eax ## encoding: [0x62,0xf4,0x7d,0x08,0xf1,0xc6]
45+
; EGPR-NEXT: crc32w %si, %eax ## EVEX TO LEGACY Compression encoding: [0x66,0xf2,0x0f,0x38,0xf1,0xc6]
4646
; EGPR-NEXT: retq ## encoding: [0xc3]
4747
%tmp = call i32 @llvm.x86.sse42.crc32.32.16(i32 %a, i16 %b)
4848
ret i32 %tmp
@@ -65,7 +65,7 @@ define i32 @crc32_32_32(i32 %a, i32 %b) nounwind {
6565
; EGPR-LABEL: crc32_32_32:
6666
; EGPR: ## %bb.0:
6767
; EGPR-NEXT: movl %edi, %eax ## encoding: [0x89,0xf8]
68-
; EGPR-NEXT: crc32l %esi, %eax ## encoding: [0x62,0xf4,0x7c,0x08,0xf1,0xc6]
68+
; EGPR-NEXT: crc32l %esi, %eax ## EVEX TO LEGACY Compression encoding: [0xf2,0x0f,0x38,0xf1,0xc6]
6969
; EGPR-NEXT: retq ## encoding: [0xc3]
7070
%tmp = call i32 @llvm.x86.sse42.crc32.32.32(i32 %a, i32 %b)
7171
ret i32 %tmp

‎llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,7 @@ define i64 @crc32_64_8(i64 %a, i8 %b) nounwind {
1515
; EGPR-LABEL: crc32_64_8:
1616
; EGPR: ## %bb.0:
1717
; EGPR-NEXT: movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
18-
; EGPR-NEXT: crc32b %sil, %eax ## encoding: [0x62,0xf4,0x7c,0x08,0xf0,0xc6]
18+
; EGPR-NEXT: crc32b %sil, %eax ## EVEX TO LEGACY Compression encoding: [0xf2,0x40,0x0f,0x38,0xf0,0xc6]
1919
; EGPR-NEXT: retq ## encoding: [0xc3]
2020
%tmp = call i64 @llvm.x86.sse42.crc32.64.8(i64 %a, i8 %b)
2121
ret i64 %tmp
@@ -31,7 +31,7 @@ define i64 @crc32_64_64(i64 %a, i64 %b) nounwind {
3131
; EGPR-LABEL: crc32_64_64:
3232
; EGPR: ## %bb.0:
3333
; EGPR-NEXT: movq %rdi, %rax ## encoding: [0x48,0x89,0xf8]
34-
; EGPR-NEXT: crc32q %rsi, %rax ## encoding: [0x62,0xf4,0xfc,0x08,0xf1,0xc6]
34+
; EGPR-NEXT: crc32q %rsi, %rax ## EVEX TO LEGACY Compression encoding: [0xf2,0x48,0x0f,0x38,0xf1,0xc6]
3535
; EGPR-NEXT: retq ## encoding: [0xc3]
3636
%tmp = call i64 @llvm.x86.sse42.crc32.64.64(i64 %a, i64 %b)
3737
ret i64 %tmp

‎llvm/test/CodeGen/X86/invpcid-intrinsic.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ define void @test_invpcid(i32 %type, ptr %descriptor) {
2020
; EGPR-LABEL: test_invpcid:
2121
; EGPR: # %bb.0: # %entry
2222
; EGPR-NEXT: movl %edi, %eax # encoding: [0x89,0xf8]
23-
; EGPR-NEXT: invpcid (%rsi), %rax # encoding: [0x62,0xf4,0x7e,0x08,0xf2,0x06]
23+
; EGPR-NEXT: invpcid (%rsi), %rax # EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0x82,0x06]
2424
; EGPR-NEXT: retq # encoding: [0xc3]
2525
entry:
2626
call void @llvm.x86.invpcid(i32 %type, ptr %descriptor)
@@ -45,7 +45,7 @@ define void @test_invpcid2(ptr readonly %type, ptr %descriptor) {
4545
; EGPR-LABEL: test_invpcid2:
4646
; EGPR: # %bb.0: # %entry
4747
; EGPR-NEXT: movl (%rdi), %eax # encoding: [0x8b,0x07]
48-
; EGPR-NEXT: invpcid (%rsi), %rax # encoding: [0x62,0xf4,0x7e,0x08,0xf2,0x06]
48+
; EGPR-NEXT: invpcid (%rsi), %rax # EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0x82,0x06]
4949
; EGPR-NEXT: retq # encoding: [0xc3]
5050
entry:
5151
%0 = load i32, ptr %type, align 4

‎llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ define void @test_movdiri(ptr %p, i32 %v) {
1818
;
1919
; EGPR-LABEL: test_movdiri:
2020
; EGPR: # %bb.0: # %entry
21-
; EGPR-NEXT: movdiri %esi, (%rdi) # encoding: [0x62,0xf4,0x7c,0x08,0xf9,0x37]
21+
; EGPR-NEXT: movdiri %esi, (%rdi) # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xf9,0x37]
2222
; EGPR-NEXT: retq # encoding: [0xc3]
2323
entry:
2424
call void @llvm.x86.directstore32(ptr %p, i32 %v)
@@ -42,7 +42,7 @@ define void @test_movdir64b(ptr %dst, ptr %src) {
4242
;
4343
; EGPR-LABEL: test_movdir64b:
4444
; EGPR: # %bb.0: # %entry
45-
; EGPR-NEXT: movdir64b (%rsi), %rdi # encoding: [0x62,0xf4,0x7d,0x08,0xf8,0x3e]
45+
; EGPR-NEXT: movdir64b (%rsi), %rdi # EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0xf8,0x3e]
4646
; EGPR-NEXT: retq # encoding: [0xc3]
4747
entry:
4848
call void @llvm.x86.movdir64b(ptr %dst, ptr %src)

‎llvm/test/CodeGen/X86/movdir-intrinsic-x86_64.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define void @test_movdiri(ptr %p, i64 %v) {
1010
;
1111
; EGPR-LABEL: test_movdiri:
1212
; EGPR: # %bb.0: # %entry
13-
; EGPR-NEXT: movdiri %rsi, (%rdi) # encoding: [0x62,0xf4,0xfc,0x08,0xf9,0x37]
13+
; EGPR-NEXT: movdiri %rsi, (%rdi) # EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x38,0xf9,0x37]
1414
; EGPR-NEXT: retq # encoding: [0xc3]
1515
entry:
1616
call void @llvm.x86.directstore64(ptr %p, i64 %v)

‎llvm/test/CodeGen/X86/sha.ll

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ define <4 x i32> @test_sha1rnds4rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable
1818
;
1919
; EGPR-LABEL: test_sha1rnds4rr:
2020
; EGPR: # %bb.0: # %entry
21-
; EGPR-NEXT: sha1rnds4 $3, %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd4,0xc1,0x03]
21+
; EGPR-NEXT: sha1rnds4 $3, %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x3a,0xcc,0xc1,0x03]
2222
; EGPR-NEXT: retq # encoding: [0xc3]
2323
entry:
2424
%0 = tail call <4 x i32> @llvm.x86.sha1rnds4(<4 x i32> %a, <4 x i32> %b, i8 3)
@@ -38,7 +38,7 @@ define <4 x i32> @test_sha1rnds4rm(<4 x i32> %a, ptr %b) nounwind uwtable {
3838
;
3939
; EGPR-LABEL: test_sha1rnds4rm:
4040
; EGPR: # %bb.0: # %entry
41-
; EGPR-NEXT: sha1rnds4 $3, (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd4,0x07,0x03]
41+
; EGPR-NEXT: sha1rnds4 $3, (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x3a,0xcc,0x07,0x03]
4242
; EGPR-NEXT: retq # encoding: [0xc3]
4343
entry:
4444
%0 = load <4 x i32>, ptr %b
@@ -61,7 +61,7 @@ define <4 x i32> @test_sha1nexterr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable
6161
;
6262
; EGPR-LABEL: test_sha1nexterr:
6363
; EGPR: # %bb.0: # %entry
64-
; EGPR-NEXT: sha1nexte %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd8,0xc1]
64+
; EGPR-NEXT: sha1nexte %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xc8,0xc1]
6565
; EGPR-NEXT: retq # encoding: [0xc3]
6666
entry:
6767
%0 = tail call <4 x i32> @llvm.x86.sha1nexte(<4 x i32> %a, <4 x i32> %b)
@@ -81,7 +81,7 @@ define <4 x i32> @test_sha1nexterm(<4 x i32> %a, ptr %b) nounwind uwtable {
8181
;
8282
; EGPR-LABEL: test_sha1nexterm:
8383
; EGPR: # %bb.0: # %entry
84-
; EGPR-NEXT: sha1nexte (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd8,0x07]
84+
; EGPR-NEXT: sha1nexte (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xc8,0x07]
8585
; EGPR-NEXT: retq # encoding: [0xc3]
8686
entry:
8787
%0 = load <4 x i32>, ptr %b
@@ -104,7 +104,7 @@ define <4 x i32> @test_sha1msg1rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable {
104104
;
105105
; EGPR-LABEL: test_sha1msg1rr:
106106
; EGPR: # %bb.0: # %entry
107-
; EGPR-NEXT: sha1msg1 %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd9,0xc1]
107+
; EGPR-NEXT: sha1msg1 %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xc9,0xc1]
108108
; EGPR-NEXT: retq # encoding: [0xc3]
109109
entry:
110110
%0 = tail call <4 x i32> @llvm.x86.sha1msg1(<4 x i32> %a, <4 x i32> %b)
@@ -124,7 +124,7 @@ define <4 x i32> @test_sha1msg1rm(<4 x i32> %a, ptr %b) nounwind uwtable {
124124
;
125125
; EGPR-LABEL: test_sha1msg1rm:
126126
; EGPR: # %bb.0: # %entry
127-
; EGPR-NEXT: sha1msg1 (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd9,0x07]
127+
; EGPR-NEXT: sha1msg1 (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xc9,0x07]
128128
; EGPR-NEXT: retq # encoding: [0xc3]
129129
entry:
130130
%0 = load <4 x i32>, ptr %b
@@ -147,7 +147,7 @@ define <4 x i32> @test_sha1msg2rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable {
147147
;
148148
; EGPR-LABEL: test_sha1msg2rr:
149149
; EGPR: # %bb.0: # %entry
150-
; EGPR-NEXT: sha1msg2 %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xda,0xc1]
150+
; EGPR-NEXT: sha1msg2 %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xca,0xc1]
151151
; EGPR-NEXT: retq # encoding: [0xc3]
152152
entry:
153153
%0 = tail call <4 x i32> @llvm.x86.sha1msg2(<4 x i32> %a, <4 x i32> %b)
@@ -167,7 +167,7 @@ define <4 x i32> @test_sha1msg2rm(<4 x i32> %a, ptr %b) nounwind uwtable {
167167
;
168168
; EGPR-LABEL: test_sha1msg2rm:
169169
; EGPR: # %bb.0: # %entry
170-
; EGPR-NEXT: sha1msg2 (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xda,0x07]
170+
; EGPR-NEXT: sha1msg2 (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xca,0x07]
171171
; EGPR-NEXT: retq # encoding: [0xc3]
172172
entry:
173173
%0 = load <4 x i32>, ptr %b
@@ -198,7 +198,7 @@ define <4 x i32> @test_sha256rnds2rr(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) n
198198
; EGPR: # %bb.0: # %entry
199199
; EGPR-NEXT: movaps %xmm0, %xmm3 # encoding: [0x0f,0x28,0xd8]
200200
; EGPR-NEXT: movaps %xmm2, %xmm0 # encoding: [0x0f,0x28,0xc2]
201-
; EGPR-NEXT: sha256rnds2 %xmm0, %xmm1, %xmm3 # encoding: [0x62,0xf4,0x7c,0x08,0xdb,0xd9]
201+
; EGPR-NEXT: sha256rnds2 %xmm0, %xmm1, %xmm3 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcb,0xd9]
202202
; EGPR-NEXT: movaps %xmm3, %xmm0 # encoding: [0x0f,0x28,0xc3]
203203
; EGPR-NEXT: retq # encoding: [0xc3]
204204
entry:
@@ -227,7 +227,7 @@ define <4 x i32> @test_sha256rnds2rm(<4 x i32> %a, ptr %b, <4 x i32> %c) nounwin
227227
; EGPR: # %bb.0: # %entry
228228
; EGPR-NEXT: movaps %xmm0, %xmm2 # encoding: [0x0f,0x28,0xd0]
229229
; EGPR-NEXT: movaps %xmm1, %xmm0 # encoding: [0x0f,0x28,0xc1]
230-
; EGPR-NEXT: sha256rnds2 %xmm0, (%rdi), %xmm2 # encoding: [0x62,0xf4,0x7c,0x08,0xdb,0x17]
230+
; EGPR-NEXT: sha256rnds2 %xmm0, (%rdi), %xmm2 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcb,0x17]
231231
; EGPR-NEXT: movaps %xmm2, %xmm0 # encoding: [0x0f,0x28,0xc2]
232232
; EGPR-NEXT: retq # encoding: [0xc3]
233233
entry:
@@ -251,7 +251,7 @@ define <4 x i32> @test_sha256msg1rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable
251251
;
252252
; EGPR-LABEL: test_sha256msg1rr:
253253
; EGPR: # %bb.0: # %entry
254-
; EGPR-NEXT: sha256msg1 %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xdc,0xc1]
254+
; EGPR-NEXT: sha256msg1 %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcc,0xc1]
255255
; EGPR-NEXT: retq # encoding: [0xc3]
256256
entry:
257257
%0 = tail call <4 x i32> @llvm.x86.sha256msg1(<4 x i32> %a, <4 x i32> %b)
@@ -271,7 +271,7 @@ define <4 x i32> @test_sha256msg1rm(<4 x i32> %a, ptr %b) nounwind uwtable {
271271
;
272272
; EGPR-LABEL: test_sha256msg1rm:
273273
; EGPR: # %bb.0: # %entry
274-
; EGPR-NEXT: sha256msg1 (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xdc,0x07]
274+
; EGPR-NEXT: sha256msg1 (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcc,0x07]
275275
; EGPR-NEXT: retq # encoding: [0xc3]
276276
entry:
277277
%0 = load <4 x i32>, ptr %b
@@ -294,7 +294,7 @@ define <4 x i32> @test_sha256msg2rr(<4 x i32> %a, <4 x i32> %b) nounwind uwtable
294294
;
295295
; EGPR-LABEL: test_sha256msg2rr:
296296
; EGPR: # %bb.0: # %entry
297-
; EGPR-NEXT: sha256msg2 %xmm1, %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xdd,0xc1]
297+
; EGPR-NEXT: sha256msg2 %xmm1, %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcd,0xc1]
298298
; EGPR-NEXT: retq # encoding: [0xc3]
299299
entry:
300300
%0 = tail call <4 x i32> @llvm.x86.sha256msg2(<4 x i32> %a, <4 x i32> %b)
@@ -314,7 +314,7 @@ define <4 x i32> @test_sha256msg2rm(<4 x i32> %a, ptr %b) nounwind uwtable {
314314
;
315315
; EGPR-LABEL: test_sha256msg2rm:
316316
; EGPR: # %bb.0: # %entry
317-
; EGPR-NEXT: sha256msg2 (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xdd,0x07]
317+
; EGPR-NEXT: sha256msg2 (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xcd,0x07]
318318
; EGPR-NEXT: retq # encoding: [0xc3]
319319
entry:
320320
%0 = load <4 x i32>, ptr %b
@@ -338,7 +338,7 @@ define <8 x i32> @test_sha1rnds4_zero_extend(<4 x i32> %a, ptr %b) nounwind uwta
338338
;
339339
; EGPR-LABEL: test_sha1rnds4_zero_extend:
340340
; EGPR: # %bb.0: # %entry
341-
; EGPR-NEXT: sha1rnds4 $3, (%rdi), %xmm0 # encoding: [0x62,0xf4,0x7c,0x08,0xd4,0x07,0x03]
341+
; EGPR-NEXT: sha1rnds4 $3, (%rdi), %xmm0 # EVEX TO LEGACY Compression encoding: [0x0f,0x3a,0xcc,0x07,0x03]
342342
; EGPR-NEXT: xorps %xmm1, %xmm1 # encoding: [0x0f,0x57,0xc9]
343343
; EGPR-NEXT: retq # encoding: [0xc3]
344344
entry:

‎llvm/test/CodeGen/X86/x64-cet-intrinsics.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -119,7 +119,7 @@ define void @test_wrssd(i32 %a, ptr %__p) {
119119
;
120120
; EGPR-LABEL: test_wrssd:
121121
; EGPR: ## %bb.0: ## %entry
122-
; EGPR-NEXT: wrssd %edi, (%rsi) ## encoding: [0x62,0xf4,0x7c,0x08,0x66,0x3e]
122+
; EGPR-NEXT: wrssd %edi, (%rsi) ## EVEX TO LEGACY Compression encoding: [0x0f,0x38,0xf6,0x3e]
123123
; EGPR-NEXT: retq ## encoding: [0xc3]
124124
entry:
125125
tail call void @llvm.x86.wrssd(i32 %a, ptr %__p)
@@ -136,7 +136,7 @@ define void @test_wrssq(i64 %a, ptr %__p) {
136136
;
137137
; EGPR-LABEL: test_wrssq:
138138
; EGPR: ## %bb.0: ## %entry
139-
; EGPR-NEXT: wrssq %rdi, (%rsi) ## encoding: [0x62,0xf4,0xfc,0x08,0x66,0x3e]
139+
; EGPR-NEXT: wrssq %rdi, (%rsi) ## EVEX TO LEGACY Compression encoding: [0x48,0x0f,0x38,0xf6,0x3e]
140140
; EGPR-NEXT: retq ## encoding: [0xc3]
141141
entry:
142142
tail call void @llvm.x86.wrssq(i64 %a, ptr %__p)
@@ -153,7 +153,7 @@ define void @test_wrussd(i32 %a, ptr %__p) {
153153
;
154154
; EGPR-LABEL: test_wrussd:
155155
; EGPR: ## %bb.0: ## %entry
156-
; EGPR-NEXT: wrussd %edi, (%rsi) ## encoding: [0x62,0xf4,0x7d,0x08,0x65,0x3e]
156+
; EGPR-NEXT: wrussd %edi, (%rsi) ## EVEX TO LEGACY Compression encoding: [0x66,0x0f,0x38,0xf5,0x3e]
157157
; EGPR-NEXT: retq ## encoding: [0xc3]
158158
entry:
159159
tail call void @llvm.x86.wrussd(i32 %a, ptr %__p)
@@ -170,7 +170,7 @@ define void @test_wrussq(i64 %a, ptr %__p) {
170170
;
171171
; EGPR-LABEL: test_wrussq:
172172
; EGPR: ## %bb.0: ## %entry
173-
; EGPR-NEXT: wrussq %rdi, (%rsi) ## encoding: [0x62,0xf4,0xfd,0x08,0x65,0x3e]
173+
; EGPR-NEXT: wrussq %rdi, (%rsi) ## EVEX TO LEGACY Compression encoding: [0x66,0x48,0x0f,0x38,0xf5,0x3e]
174174
; EGPR-NEXT: retq ## encoding: [0xc3]
175175
entry:
176176
tail call void @llvm.x86.wrussq(i64 %a, ptr %__p)

‎llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -166,13 +166,16 @@ void X86CompressEVEXTablesEmitter::run(raw_ostream &OS) {
166166

167167
for (const CodeGenInstruction *Inst : PreCompressionInsts) {
168168
const Record *Rec = Inst->TheDef;
169-
uint8_t Opcode =
170-
byteFromBitsInit(Inst->TheDef->getValueAsBitsInit("Opcode"));
169+
uint8_t Opcode = byteFromBitsInit(Rec->getValueAsBitsInit("Opcode"));
170+
StringRef Name = Rec->getName();
171171
const CodeGenInstruction *NewInst = nullptr;
172-
if (ManualMap.find(Rec->getName()) != ManualMap.end()) {
172+
if (ManualMap.find(Name) != ManualMap.end()) {
173173
Record *NewRec = Records.getDef(ManualMap.at(Rec->getName()));
174174
assert(NewRec && "Instruction not found!");
175175
NewInst = &Target.getInstruction(NewRec);
176+
} else if (Name.ends_with("_EVEX")) {
177+
if (auto *NewRec = Records.getDef(Name.drop_back(5)))
178+
NewInst = &Target.getInstruction(NewRec);
176179
} else {
177180
// For each pre-compression instruction look for a match in the appropriate
178181
// vector (instructions with the same opcode) using function object

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