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[InstCombine] Optimize TrueVal through knownbits from cond in selectInst
There are two type of change with this patch. When the Cond of SelectInst is ICmpInst. first is a special case where optimizations can be made. For example, in the case of (icmp eq (xor x, y) -1), it is impossible to estimate the bits of x and y, but the relationship between the bits of x and y is known. We define this as NoCommonBits | AllCommonBits. if (and x, y) is a trueval with this cond, then x and y are in NoCommonBits state, so (and x, y) is zero. second is that if the cond allows us to estimate the KnownBits of X or Y, then if TrueVal is a BinOp consisting of X or Y, we can optimize it. For example, if (icmp eq (or x, y) 0), then both x and y have KnownBits that can be estimated to be 0. Therefore, something like (select (icmp eq (or x, y) 0), (xor x, y), (or x, y)) can be optimized to (or x, y).
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‎llvm/test/Transforms/InstCombine/select-of-bittest.ll

Lines changed: 24 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -7,9 +7,8 @@
77
define i8 @src_and_bit(i8 %x, i8 %y) {
88
; CHECK-LABEL: @src_and_bit(
99
; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 3
10-
; CHECK-NEXT: [[AND1:%.*]] = and i8 [[X]], 2
1110
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[AND]], 2
12-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 [[AND1]], i8 1
11+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 2, i8 1
1312
; CHECK-NEXT: ret i8 [[COND]]
1413
;
1514
%and = and i8 %x, 3
@@ -23,9 +22,8 @@ define i8 @src_and_bit(i8 %x, i8 %y) {
2322
define <2 x i8> @src_and_bit_vec(<2 x i8> %x, <2 x i8> %y) {
2423
; CHECK-LABEL: @src_and_bit_vec(
2524
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 3, i8 3>
26-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 2, i8 2>
2725
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[AND]], <i8 2, i8 2>
28-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
26+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 2>, <2 x i8> <i8 1, i8 1>
2927
; CHECK-NEXT: ret <2 x i8> [[COND]]
3028
;
3129
%and = and <2 x i8> %x, <i8 3, i8 3>
@@ -39,9 +37,8 @@ define <2 x i8> @src_and_bit_vec(<2 x i8> %x, <2 x i8> %y) {
3937
define <2 x i8> @src_and_bit_vec_poison(<2 x i8> %x, <2 x i8> %y) {
4038
; CHECK-LABEL: @src_and_bit_vec_poison(
4139
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 poison, i8 3>
42-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 poison, i8 2>
4340
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[AND]], <i8 2, i8 2>
44-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
41+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 2>, <2 x i8> <i8 1, i8 1>
4542
; CHECK-NEXT: ret <2 x i8> [[COND]]
4643
;
4744
%and = and <2 x i8> %x, <i8 poison, i8 3>
@@ -55,9 +52,8 @@ define <2 x i8> @src_and_bit_vec_poison(<2 x i8> %x, <2 x i8> %y) {
5552
define <2 x i8> @src_and_bit_vec_poison2(<2 x i8> %x, <2 x i8> %y) {
5653
; CHECK-LABEL: @src_and_bit_vec_poison2(
5754
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 poison, i8 3>
58-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 poison, i8 2>
5955
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[AND]], <i8 2, i8 2>
60-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
56+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 2, i8 2>, <2 x i8> <i8 1, i8 1>
6157
; CHECK-NEXT: ret <2 x i8> [[COND]]
6258
;
6359
%and = and <2 x i8> %x, <i8 poison, i8 3>
@@ -71,9 +67,8 @@ define <2 x i8> @src_and_bit_vec_poison2(<2 x i8> %x, <2 x i8> %y) {
7167
define i8 @src_and_bit_ne(i8 %x, i8 %y) {
7268
; CHECK-LABEL: @src_and_bit_ne(
7369
; CHECK-NEXT: [[AND:%.*]] = and i8 [[X:%.*]], 3
74-
; CHECK-NEXT: [[AND1:%.*]] = and i8 [[X]], 2
7570
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i8 [[AND]], 2
76-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP_NOT]], i8 [[AND1]], i8 1
71+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP_NOT]], i8 2, i8 1
7772
; CHECK-NEXT: ret i8 [[COND]]
7873
;
7974
%and = and i8 %x, 3
@@ -87,9 +82,8 @@ define i8 @src_and_bit_ne(i8 %x, i8 %y) {
8782
define <2 x i8> @src_and_bit_vec_ne(<2 x i8> %x, <2 x i8> %y) {
8883
; CHECK-LABEL: @src_and_bit_vec_ne(
8984
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 3, i8 3>
90-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 2, i8 2>
9185
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i8> [[AND]], <i8 2, i8 2>
92-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
86+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> <i8 2, i8 2>, <2 x i8> <i8 1, i8 1>
9387
; CHECK-NEXT: ret <2 x i8> [[COND]]
9488
;
9589
%and = and <2 x i8> %x, <i8 3, i8 3>
@@ -103,9 +97,8 @@ define <2 x i8> @src_and_bit_vec_ne(<2 x i8> %x, <2 x i8> %y) {
10397
define <2 x i8> @src_and_bit_vec_poison_ne(<2 x i8> %x, <2 x i8> %y) {
10498
; CHECK-LABEL: @src_and_bit_vec_poison_ne(
10599
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 poison, i8 3>
106-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 poison, i8 2>
107100
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i8> [[AND]], <i8 2, i8 2>
108-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
101+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> <i8 2, i8 2>, <2 x i8> <i8 1, i8 1>
109102
; CHECK-NEXT: ret <2 x i8> [[COND]]
110103
;
111104
%and = and <2 x i8> %x, <i8 poison, i8 3>
@@ -119,9 +112,8 @@ define <2 x i8> @src_and_bit_vec_poison_ne(<2 x i8> %x, <2 x i8> %y) {
119112
define <2 x i8> @src_and_bit_vec_poison2_ne(<2 x i8> %x, <2 x i8> %y) {
120113
; CHECK-LABEL: @src_and_bit_vec_poison2_ne(
121114
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 poison, i8 3>
122-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 poison, i8 2>
123115
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i8> [[AND]], <i8 2, i8 2>
124-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
116+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> <i8 2, i8 2>, <2 x i8> <i8 1, i8 1>
125117
; CHECK-NEXT: ret <2 x i8> [[COND]]
126118
;
127119
%and = and <2 x i8> %x, <i8 poison, i8 3>
@@ -135,13 +127,11 @@ define <2 x i8> @src_and_bit_vec_poison2_ne(<2 x i8> %x, <2 x i8> %y) {
135127
; ====================== OR =======================
136128
define i8 @src_or_bit(i8 %x, i8 %y, i8 %z) {
137129
; CHECK-LABEL: @src_or_bit(
138-
; CHECK-NEXT: [[AND:%.*]] = and i8 [[Z:%.*]], 3
139130
; CHECK-NEXT: [[AND1:%.*]] = shl i8 [[Y:%.*]], 2
140131
; CHECK-NEXT: [[SHL:%.*]] = and i8 [[AND1]], 12
141132
; CHECK-NEXT: [[OR:%.*]] = or i8 [[SHL]], [[X:%.*]]
142133
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[OR]], 3
143-
; CHECK-NEXT: [[OR2:%.*]] = or i8 [[AND]], [[X]]
144-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 [[OR2]], i8 1
134+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 3, i8 1
145135
; CHECK-NEXT: ret i8 [[COND]]
146136
;
147137
%and = and i8 %z, 3
@@ -156,13 +146,11 @@ define i8 @src_or_bit(i8 %x, i8 %y, i8 %z) {
156146

157147
define <2 x i8> @src_or_bit_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
158148
; CHECK-LABEL: @src_or_bit_vec(
159-
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Z:%.*]], <i8 3, i8 3>
160149
; CHECK-NEXT: [[AND1:%.*]] = shl <2 x i8> [[Y:%.*]], <i8 2, i8 2>
161150
; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[AND1]], <i8 12, i8 12>
162151
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[SHL]], [[X:%.*]]
163152
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[OR]], <i8 3, i8 3>
164-
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i8> [[AND]], [[X]]
165-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[OR2]], <2 x i8> <i8 1, i8 1>
153+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
166154
; CHECK-NEXT: ret <2 x i8> [[COND]]
167155
;
168156
%and = and <2 x i8> %z, <i8 3, i8 3>
@@ -177,13 +165,11 @@ define <2 x i8> @src_or_bit_vec(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
177165

178166
define <2 x i8> @src_or_bit_vec_poison(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
179167
; CHECK-LABEL: @src_or_bit_vec_poison(
180-
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Z:%.*]], <i8 3, i8 poison>
181168
; CHECK-NEXT: [[AND1:%.*]] = shl <2 x i8> [[Y:%.*]], <i8 2, i8 poison>
182169
; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[AND1]], <i8 12, i8 poison>
183170
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[SHL]], [[X:%.*]]
184171
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[OR]], <i8 3, i8 3>
185-
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i8> [[AND]], [[X]]
186-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[OR2]], <2 x i8> <i8 1, i8 1>
172+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
187173
; CHECK-NEXT: ret <2 x i8> [[COND]]
188174
;
189175
%and = and <2 x i8> %z, <i8 3, i8 poison>
@@ -198,13 +184,11 @@ define <2 x i8> @src_or_bit_vec_poison(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
198184

199185
define <2 x i8> @src_or_bit_vec_poison2(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
200186
; CHECK-LABEL: @src_or_bit_vec_poison2(
201-
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Z:%.*]], <i8 poison, i8 3>
202187
; CHECK-NEXT: [[AND1:%.*]] = shl <2 x i8> [[Y:%.*]], <i8 poison, i8 2>
203188
; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[AND1]], <i8 poison, i8 12>
204189
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[SHL]], [[X:%.*]]
205190
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[OR]], <i8 3, i8 3>
206-
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i8> [[AND]], [[X]]
207-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[OR2]], <2 x i8> <i8 1, i8 1>
191+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
208192
; CHECK-NEXT: ret <2 x i8> [[COND]]
209193
;
210194
%and = and <2 x i8> %z, <i8 poison, i8 3>
@@ -219,13 +203,11 @@ define <2 x i8> @src_or_bit_vec_poison2(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
219203

220204
define i8 @src_or_bit_ne(i8 %x, i8 %y, i8 %z) {
221205
; CHECK-LABEL: @src_or_bit_ne(
222-
; CHECK-NEXT: [[AND:%.*]] = and i8 [[Z:%.*]], 3
223206
; CHECK-NEXT: [[AND1:%.*]] = shl i8 [[Y:%.*]], 2
224207
; CHECK-NEXT: [[SHL:%.*]] = and i8 [[AND1]], 12
225208
; CHECK-NEXT: [[OR:%.*]] = or i8 [[SHL]], [[X:%.*]]
226209
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i8 [[OR]], 3
227-
; CHECK-NEXT: [[OR2:%.*]] = or i8 [[AND]], [[X]]
228-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP_NOT]], i8 [[OR2]], i8 1
210+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP_NOT]], i8 3, i8 1
229211
; CHECK-NEXT: ret i8 [[COND]]
230212
;
231213
%and = and i8 %z, 3
@@ -240,13 +222,11 @@ define i8 @src_or_bit_ne(i8 %x, i8 %y, i8 %z) {
240222

241223
define <2 x i8> @src_or_bit_vec_ne(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
242224
; CHECK-LABEL: @src_or_bit_vec_ne(
243-
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Z:%.*]], <i8 3, i8 3>
244225
; CHECK-NEXT: [[AND1:%.*]] = shl <2 x i8> [[Y:%.*]], <i8 2, i8 2>
245226
; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[AND1]], <i8 12, i8 12>
246227
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[SHL]], [[X:%.*]]
247228
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i8> [[OR]], <i8 3, i8 3>
248-
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i8> [[AND]], [[X]]
249-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> [[OR2]], <2 x i8> <i8 1, i8 1>
229+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
250230
; CHECK-NEXT: ret <2 x i8> [[COND]]
251231
;
252232
%and = and <2 x i8> %z, <i8 3, i8 3>
@@ -261,13 +241,11 @@ define <2 x i8> @src_or_bit_vec_ne(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
261241

262242
define <2 x i8> @src_or_bit_vec_poison_ne(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
263243
; CHECK-LABEL: @src_or_bit_vec_poison_ne(
264-
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Z:%.*]], <i8 3, i8 poison>
265244
; CHECK-NEXT: [[AND1:%.*]] = shl <2 x i8> [[Y:%.*]], <i8 2, i8 poison>
266245
; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[AND1]], <i8 12, i8 poison>
267246
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[SHL]], [[X:%.*]]
268247
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i8> [[OR]], <i8 3, i8 3>
269-
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i8> [[AND]], [[X]]
270-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> [[OR2]], <2 x i8> <i8 1, i8 1>
248+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
271249
; CHECK-NEXT: ret <2 x i8> [[COND]]
272250
;
273251
%and = and <2 x i8> %z, <i8 3, i8 poison>
@@ -282,13 +260,11 @@ define <2 x i8> @src_or_bit_vec_poison_ne(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z)
282260

283261
define <2 x i8> @src_or_bit_vec_poison2_ne(<2 x i8> %x, <2 x i8> %y, <2 x i8> %z) {
284262
; CHECK-LABEL: @src_or_bit_vec_poison2_ne(
285-
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Z:%.*]], <i8 poison, i8 3>
286263
; CHECK-NEXT: [[AND1:%.*]] = shl <2 x i8> [[Y:%.*]], <i8 poison, i8 2>
287264
; CHECK-NEXT: [[SHL:%.*]] = and <2 x i8> [[AND1]], <i8 poison, i8 12>
288265
; CHECK-NEXT: [[OR:%.*]] = or <2 x i8> [[SHL]], [[X:%.*]]
289266
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i8> [[OR]], <i8 3, i8 3>
290-
; CHECK-NEXT: [[OR2:%.*]] = or <2 x i8> [[AND]], [[X]]
291-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> [[OR2]], <2 x i8> <i8 1, i8 1>
267+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
292268
; CHECK-NEXT: ret <2 x i8> [[COND]]
293269
;
294270
%and = and <2 x i8> %z, <i8 poison, i8 3>
@@ -307,8 +283,7 @@ define i8 @src_xor_bit(i8 %x, i8 %y) {
307283
; CHECK-NEXT: [[AND:%.*]] = and i8 [[Y:%.*]], 12
308284
; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[AND]], [[X:%.*]]
309285
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[XOR]], 3
310-
; CHECK-NEXT: [[AND1:%.*]] = and i8 [[X]], 3
311-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 [[AND1]], i8 1
286+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP]], i8 3, i8 1
312287
; CHECK-NEXT: ret i8 [[COND]]
313288
;
314289
%and = and i8 %y, 12
@@ -324,8 +299,7 @@ define <2 x i8> @src_xor_bit_vec(<2 x i8> %x, <2 x i8> %y) {
324299
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Y:%.*]], <i8 12, i8 12>
325300
; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i8> [[AND]], [[X:%.*]]
326301
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[XOR]], <i8 3, i8 3>
327-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 3, i8 3>
328-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
302+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
329303
; CHECK-NEXT: ret <2 x i8> [[COND]]
330304
;
331305
%and = and <2 x i8> %y, <i8 12, i8 12>
@@ -341,8 +315,7 @@ define <2 x i8> @src_xor_bit_vec_poison(<2 x i8> %x, <2 x i8> %y) {
341315
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Y:%.*]], <i8 poison, i8 12>
342316
; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i8> [[AND]], [[X:%.*]]
343317
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[XOR]], <i8 3, i8 3>
344-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 poison, i8 3>
345-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
318+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
346319
; CHECK-NEXT: ret <2 x i8> [[COND]]
347320
;
348321
%and = and <2 x i8> %y, <i8 poison, i8 12>
@@ -358,8 +331,7 @@ define <2 x i8> @src_xor_bit_vec_poison2(<2 x i8> %x, <2 x i8> %y) {
358331
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Y:%.*]], <i8 poison, i8 12>
359332
; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i8> [[AND]], [[X:%.*]]
360333
; CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i8> [[XOR]], <i8 3, i8 3>
361-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 3, i8 3>
362-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
334+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
363335
; CHECK-NEXT: ret <2 x i8> [[COND]]
364336
;
365337
%and = and <2 x i8> %y, <i8 poison, i8 12>
@@ -375,8 +347,7 @@ define i8 @src_xor_bit_ne(i8 %x, i8 %y) {
375347
; CHECK-NEXT: [[AND:%.*]] = and i8 [[Y:%.*]], 12
376348
; CHECK-NEXT: [[XOR:%.*]] = xor i8 [[AND]], [[X:%.*]]
377349
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq i8 [[XOR]], 3
378-
; CHECK-NEXT: [[AND1:%.*]] = and i8 [[X]], 3
379-
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP_NOT]], i8 [[AND1]], i8 1
350+
; CHECK-NEXT: [[COND:%.*]] = select i1 [[CMP_NOT]], i8 3, i8 1
380351
; CHECK-NEXT: ret i8 [[COND]]
381352
;
382353
%and = and i8 %y, 12
@@ -392,8 +363,7 @@ define <2 x i8> @src_xor_bit_vec_ne(<2 x i8> %x, <2 x i8> %y) {
392363
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Y:%.*]], <i8 12, i8 12>
393364
; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i8> [[AND]], [[X:%.*]]
394365
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i8> [[XOR]], <i8 3, i8 3>
395-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 3, i8 3>
396-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
366+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
397367
; CHECK-NEXT: ret <2 x i8> [[COND]]
398368
;
399369
%and = and <2 x i8> %y, <i8 12, i8 12>
@@ -409,8 +379,7 @@ define <2 x i8> @src_xor_bit_vec_poison_ne(<2 x i8> %x, <2 x i8> %y) {
409379
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Y:%.*]], <i8 poison, i8 12>
410380
; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i8> [[AND]], [[X:%.*]]
411381
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i8> [[XOR]], <i8 3, i8 3>
412-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 poison, i8 3>
413-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
382+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
414383
; CHECK-NEXT: ret <2 x i8> [[COND]]
415384
;
416385
%and = and <2 x i8> %y, <i8 poison, i8 12>
@@ -426,8 +395,7 @@ define <2 x i8> @src_xor_bit_vec_poison2_ne(<2 x i8> %x, <2 x i8> %y) {
426395
; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[Y:%.*]], <i8 poison, i8 12>
427396
; CHECK-NEXT: [[XOR:%.*]] = xor <2 x i8> [[AND]], [[X:%.*]]
428397
; CHECK-NEXT: [[CMP_NOT:%.*]] = icmp eq <2 x i8> [[XOR]], <i8 3, i8 3>
429-
; CHECK-NEXT: [[AND1:%.*]] = and <2 x i8> [[X]], <i8 3, i8 3>
430-
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> [[AND1]], <2 x i8> <i8 1, i8 1>
398+
; CHECK-NEXT: [[COND:%.*]] = select <2 x i1> [[CMP_NOT]], <2 x i8> <i8 3, i8 3>, <2 x i8> <i8 1, i8 1>
431399
; CHECK-NEXT: ret <2 x i8> [[COND]]
432400
;
433401
%and = and <2 x i8> %y, <i8 poison, i8 12>

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