@@ -339,6 +339,10 @@ static cl::opt<bool, true> EnableLowerModuleLDS(
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cl::location(AMDGPUTargetMachine::EnableLowerModuleLDS), cl::init(true ),
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cl::Hidden);
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+ static cl::opt<bool > EnableSwLowerLDS (" amdgpu-enable-sw-lower-lds" ,
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+ cl::desc (" Enable sw lower lds pass" ),
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+ cl::init(true ), cl::Hidden);
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+
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static cl::opt<bool > EnablePreRAOptimizations (
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" amdgpu-enable-pre-ra-optimizations" ,
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cl::desc (" Enable Pre-RA optimizations pass" ), cl::init(true ),
@@ -600,12 +604,7 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
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bool AMDGPUTargetMachine::EnableLateStructurizeCFG = false ;
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bool AMDGPUTargetMachine::EnableFunctionCalls = false ;
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- #if __has_feature(address_sanitizer)
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- bool AMDGPUTargetMachine::EnableLowerModuleLDS = false ;
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- EnableLowerModuleLDS = false ;
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- #else
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bool AMDGPUTargetMachine::EnableLowerModuleLDS = true ;
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- #endif
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bool AMDGPUTargetMachine::DisableStructurizer = false ;
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AMDGPUTargetMachine::~AMDGPUTargetMachine () = default ;
@@ -677,8 +676,8 @@ void AMDGPUTargetMachine::registerPassBuilderCallbacks(
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PB.registerPipelineEarlySimplificationEPCallback (
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[](ModulePassManager &PM, OptimizationLevel Level) {
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PM.addPass (AMDGPUPrintfRuntimeBindingPass ());
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-
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- PM.addPass (AMDGPUSwLowerLDSPass ());
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+ if (EnableSwLowerLDS)
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+ PM.addPass (AMDGPUSwLowerLDSPass ());
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if (Level == OptimizationLevel::O0)
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return ;
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