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[LoopFusion] Regenerate test checks (NFC)
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‎llvm/test/Transforms/LoopFusion/simple.ll

+231-86
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,49 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
12
; RUN: opt -S -loop-fusion < %s | FileCheck %s
23

34
@B = common global [1024 x i32] zeroinitializer, align 16
45

5-
; CHECK: void @dep_free
6-
; CHECK-NEXT: bb:
7-
; CHECK-NEXT: br label %[[LOOP1HEADER:bb[0-9]*]]
8-
; CHECK: [[LOOP1HEADER]]
9-
; CHECK: br label %[[LOOP2HEADER:bb[0-9]*]]
10-
; CHECK: [[LOOP2HEADER]]
11-
; CHECK: br label %[[LOOP2LATCH:bb[0-9]+]]
12-
; CHECK: [[LOOP2LATCH]]
13-
; CHECK: br i1 %{{.*}}, label %[[LOOP1HEADER]], label %{{.*}}
14-
; CHECK: ret void
156
define void @dep_free(i32* noalias %arg) {
7+
; CHECK-LABEL: @dep_free(
8+
; CHECK-NEXT: bb:
9+
; CHECK-NEXT: br label [[BB7:%.*]]
10+
; CHECK: bb7:
11+
; CHECK-NEXT: [[DOT014:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ [[TMP15:%.*]], [[BB27:%.*]] ]
12+
; CHECK-NEXT: [[INDVARS_IV23:%.*]] = phi i64 [ 0, [[BB]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[BB27]] ]
13+
; CHECK-NEXT: [[DOT02:%.*]] = phi i32 [ 0, [[BB]] ], [ [[TMP28:%.*]], [[BB27]] ]
14+
; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ 0, [[BB]] ], [ [[INDVARS_IV_NEXT:%.*]], [[BB27]] ]
15+
; CHECK-NEXT: [[TMP:%.*]] = add nsw i32 [[DOT014]], -3
16+
; CHECK-NEXT: [[TMP8:%.*]] = add nuw nsw i64 [[INDVARS_IV23]], 3
17+
; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP8]] to i32
18+
; CHECK-NEXT: [[TMP10:%.*]] = mul nsw i32 [[TMP]], [[TMP9]]
19+
; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[INDVARS_IV23]] to i32
20+
; CHECK-NEXT: [[TMP12:%.*]] = srem i32 [[TMP10]], [[TMP11]]
21+
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[INDVARS_IV23]]
22+
; CHECK-NEXT: store i32 [[TMP12]], i32* [[TMP13]], align 4
23+
; CHECK-NEXT: br label [[BB14:%.*]]
24+
; CHECK: bb14:
25+
; CHECK-NEXT: [[TMP20:%.*]] = add nsw i32 [[DOT02]], -3
26+
; CHECK-NEXT: [[TMP21:%.*]] = add nuw nsw i64 [[INDVARS_IV1]], 3
27+
; CHECK-NEXT: [[TMP22:%.*]] = trunc i64 [[TMP21]] to i32
28+
; CHECK-NEXT: [[TMP23:%.*]] = mul nsw i32 [[TMP20]], [[TMP22]]
29+
; CHECK-NEXT: [[TMP24:%.*]] = trunc i64 [[INDVARS_IV1]] to i32
30+
; CHECK-NEXT: [[TMP25:%.*]] = srem i32 [[TMP23]], [[TMP24]]
31+
; CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 [[INDVARS_IV1]]
32+
; CHECK-NEXT: store i32 [[TMP25]], i32* [[TMP26]], align 4
33+
; CHECK-NEXT: br label [[BB27]]
34+
; CHECK: bb27:
35+
; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV23]], 1
36+
; CHECK-NEXT: [[TMP15]] = add nuw nsw i32 [[DOT014]], 1
37+
; CHECK-NEXT: [[EXITCOND4:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], 100
38+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
39+
; CHECK-NEXT: [[TMP28]] = add nuw nsw i32 [[DOT02]], 1
40+
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
41+
; CHECK-NEXT: br i1 [[EXITCOND]], label [[BB7]], label [[BB18:%.*]]
42+
; CHECK: bb18:
43+
; CHECK-NEXT: br label [[BB29:%.*]]
44+
; CHECK: bb29:
45+
; CHECK-NEXT: ret void
46+
;
1647
bb:
1748
br label %bb7
1849

@@ -64,19 +95,45 @@ bb29: ; preds = %bb18
6495
ret void
6596
}
6697

67-
; CHECK: void @dep_free_parametric
68-
; CHECK-NEXT: bb:
69-
; CHECK: br i1 %{{.*}}, label %[[LOOP1PREHEADER:bb[0-9.a-z]*]], label %[[EXITBLOCK:bb[0-9]*]]
70-
; CHECK: [[LOOP1PREHEADER]]
71-
; CHECK: br label %[[LOOP1HEADER:bb[0-9]*]]
72-
; CHECK: [[LOOP1HEADER]]
73-
; CHECK: br label %[[LOOP2HEADER:bb[0-9]*]]
74-
; CHECK: [[LOOP2HEADER]]
75-
; CHECK: br label %[[LOOP2LATCH:bb[0-9]+]]
76-
; CHECK: [[LOOP2LATCH]]
77-
; CHECK: br i1 %{{.*}}, label %[[LOOP1HEADER]], label %[[EXITBLOCK]]
78-
; CHECK: ret void
7998
define void @dep_free_parametric(i32* noalias %arg, i64 %arg2) {
99+
; CHECK-LABEL: @dep_free_parametric(
100+
; CHECK-NEXT: bb:
101+
; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i64 0, [[ARG2:%.*]]
102+
; CHECK-NEXT: [[TMP161:%.*]] = icmp slt i64 0, [[ARG2]]
103+
; CHECK-NEXT: br i1 [[TMP3]], label [[BB5_PREHEADER:%.*]], label [[BB27:%.*]]
104+
; CHECK: bb5.preheader:
105+
; CHECK-NEXT: br label [[BB5:%.*]]
106+
; CHECK: bb5:
107+
; CHECK-NEXT: [[DOT014:%.*]] = phi i64 [ [[TMP13:%.*]], [[BB25:%.*]] ], [ 0, [[BB5_PREHEADER]] ]
108+
; CHECK-NEXT: [[DOT02:%.*]] = phi i64 [ [[TMP26:%.*]], [[BB25]] ], [ 0, [[BB5_PREHEADER]] ]
109+
; CHECK-NEXT: [[TMP6:%.*]] = add nsw i64 [[DOT014]], -3
110+
; CHECK-NEXT: [[TMP7:%.*]] = add nuw nsw i64 [[DOT014]], 3
111+
; CHECK-NEXT: [[TMP8:%.*]] = mul nsw i64 [[TMP6]], [[TMP7]]
112+
; CHECK-NEXT: [[TMP9:%.*]] = srem i64 [[TMP8]], [[DOT014]]
113+
; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[TMP9]] to i32
114+
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[DOT014]]
115+
; CHECK-NEXT: store i32 [[TMP10]], i32* [[TMP11]], align 4
116+
; CHECK-NEXT: br label [[BB12:%.*]]
117+
; CHECK: bb12:
118+
; CHECK-NEXT: [[TMP19:%.*]] = add nsw i64 [[DOT02]], -3
119+
; CHECK-NEXT: [[TMP20:%.*]] = add nuw nsw i64 [[DOT02]], 3
120+
; CHECK-NEXT: [[TMP21:%.*]] = mul nsw i64 [[TMP19]], [[TMP20]]
121+
; CHECK-NEXT: [[TMP22:%.*]] = srem i64 [[TMP21]], [[DOT02]]
122+
; CHECK-NEXT: [[TMP23:%.*]] = trunc i64 [[TMP22]] to i32
123+
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 [[DOT02]]
124+
; CHECK-NEXT: store i32 [[TMP23]], i32* [[TMP24]], align 4
125+
; CHECK-NEXT: br label [[BB25]]
126+
; CHECK: bb25:
127+
; CHECK-NEXT: [[TMP13]] = add nuw nsw i64 [[DOT014]], 1
128+
; CHECK-NEXT: [[TMP:%.*]] = icmp slt i64 [[TMP13]], [[ARG2]]
129+
; CHECK-NEXT: [[TMP26]] = add nuw nsw i64 [[DOT02]], 1
130+
; CHECK-NEXT: [[TMP16:%.*]] = icmp slt i64 [[TMP26]], [[ARG2]]
131+
; CHECK-NEXT: br i1 [[TMP16]], label [[BB5]], label [[BB27_LOOPEXIT:%.*]]
132+
; CHECK: bb27.loopexit:
133+
; CHECK-NEXT: br label [[BB27]]
134+
; CHECK: bb27:
135+
; CHECK-NEXT: ret void
136+
;
80137
bb:
81138
%tmp3 = icmp slt i64 0, %arg2
82139
br i1 %tmp3, label %bb5, label %bb15.preheader
@@ -121,17 +178,33 @@ bb27: ; preds = %bb17
121178
ret void
122179
}
123180

124-
; CHECK: void @raw_only
125-
; CHECK-NEXT: bb:
126-
; CHECK-NEXT: br label %[[LOOP1HEADER:bb[0-9]*]]
127-
; CHECK: [[LOOP1HEADER]]
128-
; CHECK: br label %[[LOOP2HEADER:bb[0-9]*]]
129-
; CHECK: [[LOOP2HEADER]]
130-
; CHECK: br label %[[LOOP2LATCH:bb[0-9]+]]
131-
; CHECK: [[LOOP2LATCH]]
132-
; CHECK: br i1 %{{.*}}, label %[[LOOP1HEADER]], label %{{.*}}
133-
; CHECK: ret void
134181
define void @raw_only(i32* noalias %arg) {
182+
; CHECK-LABEL: @raw_only(
183+
; CHECK-NEXT: bb:
184+
; CHECK-NEXT: br label [[BB7:%.*]]
185+
; CHECK: bb7:
186+
; CHECK-NEXT: [[INDVARS_IV22:%.*]] = phi i64 [ 0, [[BB:%.*]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[BB18:%.*]] ]
187+
; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ 0, [[BB]] ], [ [[INDVARS_IV_NEXT:%.*]], [[BB18]] ]
188+
; CHECK-NEXT: [[TMP:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[INDVARS_IV22]]
189+
; CHECK-NEXT: [[TMP8:%.*]] = trunc i64 [[INDVARS_IV22]] to i32
190+
; CHECK-NEXT: store i32 [[TMP8]], i32* [[TMP]], align 4
191+
; CHECK-NEXT: br label [[BB9:%.*]]
192+
; CHECK: bb9:
193+
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 [[INDVARS_IV1]]
194+
; CHECK-NEXT: [[TMP15:%.*]] = load i32, i32* [[TMP14]], align 4
195+
; CHECK-NEXT: [[TMP16:%.*]] = shl nsw i32 [[TMP15]], 1
196+
; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 [[INDVARS_IV1]]
197+
; CHECK-NEXT: store i32 [[TMP16]], i32* [[TMP17]], align 4
198+
; CHECK-NEXT: br label [[BB18]]
199+
; CHECK: bb18:
200+
; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV22]], 1
201+
; CHECK-NEXT: [[EXITCOND4:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], 100
202+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
203+
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
204+
; CHECK-NEXT: br i1 [[EXITCOND]], label [[BB7]], label [[BB19:%.*]]
205+
; CHECK: bb19:
206+
; CHECK-NEXT: ret void
207+
;
135208
bb:
136209
br label %bb7
137210

@@ -167,15 +240,35 @@ bb19: ; preds = %bb18
167240
ret void
168241
}
169242

170-
; CHECK: void @raw_only_parametric
171-
; CHECK-NEXT: bb:
172-
; CHECK: br i1 %{{.*}}, label %[[LOOP1PREHEADER:bb[0-9.a-z]*]], label %[[EXITBLOCK:bb[0-9]*]]
173-
; CHECK: [[LOOP1PREHEADER]]
174-
; CHECK: br label %[[LOOP1HEADER:bb[0-9]*]]
175-
; CHECK: [[LOOP1HEADER]]
176-
; CHECK: br i1 %{{.*}}, label %[[LOOP1HEADER]], label %[[EXITBLOCK]]
177-
; CHECK: ret void
178243
define void @raw_only_parametric(i32* noalias %arg, i32 %arg4) {
244+
; CHECK-LABEL: @raw_only_parametric(
245+
; CHECK-NEXT: bb:
246+
; CHECK-NEXT: [[TMP:%.*]] = sext i32 [[ARG4:%.*]] to i64
247+
; CHECK-NEXT: [[TMP64:%.*]] = icmp sgt i32 [[ARG4]], 0
248+
; CHECK-NEXT: br i1 [[TMP64]], label [[BB8_PREHEADER:%.*]], label [[BB23:%.*]]
249+
; CHECK: bb8.preheader:
250+
; CHECK-NEXT: br label [[BB8:%.*]]
251+
; CHECK: bb8:
252+
; CHECK-NEXT: [[INDVARS_IV25:%.*]] = phi i64 [ [[INDVARS_IV_NEXT3:%.*]], [[BB8]] ], [ 0, [[BB8_PREHEADER]] ]
253+
; CHECK-NEXT: [[INDVARS_IV3:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BB8]] ], [ 0, [[BB8_PREHEADER]] ]
254+
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[INDVARS_IV25]]
255+
; CHECK-NEXT: [[TMP10:%.*]] = trunc i64 [[INDVARS_IV25]] to i32
256+
; CHECK-NEXT: store i32 [[TMP10]], i32* [[TMP9]], align 4
257+
; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV25]], 1
258+
; CHECK-NEXT: [[TMP6:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT3]], [[TMP]]
259+
; CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 [[INDVARS_IV3]]
260+
; CHECK-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4
261+
; CHECK-NEXT: [[TMP20:%.*]] = shl nsw i32 [[TMP19]], 1
262+
; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1024 x i32], [1024 x i32]* @B, i64 0, i64 [[INDVARS_IV3]]
263+
; CHECK-NEXT: store i32 [[TMP20]], i32* [[TMP21]], align 4
264+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV3]], 1
265+
; CHECK-NEXT: [[TMP15:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT]], [[TMP]]
266+
; CHECK-NEXT: br i1 [[TMP15]], label [[BB8]], label [[BB23_LOOPEXIT:%.*]]
267+
; CHECK: bb23.loopexit:
268+
; CHECK-NEXT: br label [[BB23]]
269+
; CHECK: bb23:
270+
; CHECK-NEXT: ret void
271+
;
179272
bb:
180273
%tmp = sext i32 %arg4 to i64
181274
%tmp64 = icmp sgt i32 %arg4, 0
@@ -205,17 +298,41 @@ bb23: ; preds = %bb17, %bb
205298
ret void
206299
}
207300

208-
; CHECK: void @forward_dep
209-
; CHECK-NEXT: bb:
210-
; CHECK: br label %[[LOOP1HEADER:bb[0-9]*]]
211-
; CHECK: [[LOOP1HEADER]]
212-
; CHECK: br label %[[LOOP2HEADER:bb[0-9]*]]
213-
; CHECK: [[LOOP2HEADER]]
214-
; CHECK: br label %[[LOOP2LATCH:bb[0-9]+]]
215-
; CHECK: [[LOOP2LATCH]]
216-
; CHECK: br i1 %{{.*}}, label %[[LOOP1HEADER]], label %{{.*}}
217-
; CHECK: ret void
218301
define void @forward_dep(i32* noalias %arg) {
302+
; CHECK-LABEL: @forward_dep(
303+
; CHECK-NEXT: bb:
304+
; CHECK-NEXT: br label [[BB7:%.*]]
305+
; CHECK: bb7:
306+
; CHECK-NEXT: [[DOT013:%.*]] = phi i32 [ 0, [[BB:%.*]] ], [ [[TMP15:%.*]], [[BB25:%.*]] ]
307+
; CHECK-NEXT: [[INDVARS_IV22:%.*]] = phi i64 [ 0, [[BB]] ], [ [[INDVARS_IV_NEXT3:%.*]], [[BB25]] ]
308+
; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[BB25]] ], [ 0, [[BB]] ]
309+
; CHECK-NEXT: [[TMP:%.*]] = add nsw i32 [[DOT013]], -3
310+
; CHECK-NEXT: [[TMP8:%.*]] = add nuw nsw i64 [[INDVARS_IV22]], 3
311+
; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP8]] to i32
312+
; CHECK-NEXT: [[TMP10:%.*]] = mul nsw i32 [[TMP]], [[TMP9]]
313+
; CHECK-NEXT: [[TMP11:%.*]] = trunc i64 [[INDVARS_IV22]] to i32
314+
; CHECK-NEXT: [[TMP12:%.*]] = srem i32 [[TMP10]], [[TMP11]]
315+
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[ARG:%.*]], i64 [[INDVARS_IV22]]
316+
; CHECK-NEXT: store i32 [[TMP12]], i32* [[TMP13]], align 4
317+
; CHECK-NEXT: br label [[BB14:%.*]]
318+
; CHECK: bb14:
319+
; CHECK-NEXT: [[TMP20:%.*]] = add nsw i64 [[INDVARS_IV1]], -3
320+
; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 [[TMP20]]
321+
; CHECK-NEXT: [[TMP22:%.*]] = load i32, i32* [[TMP21]], align 4
322+
; CHECK-NEXT: [[TMP23:%.*]] = mul nsw i32 [[TMP22]], 3
323+
; CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds i32, i32* [[ARG]], i64 [[INDVARS_IV1]]
324+
; CHECK-NEXT: store i32 [[TMP23]], i32* [[TMP24]], align 4
325+
; CHECK-NEXT: br label [[BB25]]
326+
; CHECK: bb25:
327+
; CHECK-NEXT: [[INDVARS_IV_NEXT3]] = add nuw nsw i64 [[INDVARS_IV22]], 1
328+
; CHECK-NEXT: [[TMP15]] = add nuw nsw i32 [[DOT013]], 1
329+
; CHECK-NEXT: [[EXITCOND4:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT3]], 100
330+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV1]], 1
331+
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], 100
332+
; CHECK-NEXT: br i1 [[EXITCOND]], label [[BB7]], label [[BB26:%.*]]
333+
; CHECK: bb26:
334+
; CHECK-NEXT: ret void
335+
;
219336
bb:
220337
br label %bb7
221338

@@ -261,21 +378,29 @@ bb26: ; preds = %bb25
261378
; latch iff it is proven safe. %inc.first and %cmp.first are moved, but
262379
; `store i32 0, i32* %Ai.first` is not.
263380

264-
; CHECK: void @flow_dep
265-
; CHECK-LABEL: entry:
266-
; CHECK-NEXT: br label %for.first
267-
; CHECK-LABEL: for.first:
268-
; CHECK: store i32 0, i32* %Ai.first
269-
; CHECK: %Ai.second =
270-
; CHECK: br label %for.second.latch
271-
; CHECK-LABEL: for.second.latch:
272-
; CHECK-NEXT: %inc.first = add nsw i64 %i.first, 1
273-
; CHECK-NEXT: %cmp.first = icmp slt i64 %inc.first, 100
274-
; CHECK: br i1 %cmp.second, label %for.first, label %for.end
275-
; CHECK-LABEL: for.end:
276-
; CHECK-NEXT: ret void
277-
278381
define void @flow_dep(i32* noalias %A, i32* noalias %B) {
382+
; CHECK-LABEL: @flow_dep(
383+
; CHECK-NEXT: entry:
384+
; CHECK-NEXT: br label [[FOR_FIRST:%.*]]
385+
; CHECK: for.first:
386+
; CHECK-NEXT: [[I_FIRST:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC_FIRST:%.*]], [[FOR_SECOND_LATCH:%.*]] ]
387+
; CHECK-NEXT: [[I_SECOND:%.*]] = phi i64 [ [[INC_SECOND:%.*]], [[FOR_SECOND_LATCH]] ], [ 0, [[ENTRY]] ]
388+
; CHECK-NEXT: [[AI_FIRST:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[I_FIRST]]
389+
; CHECK-NEXT: store i32 0, i32* [[AI_FIRST]], align 4
390+
; CHECK-NEXT: [[AI_SECOND:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[I_SECOND]]
391+
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[AI_SECOND]], align 4
392+
; CHECK-NEXT: [[BI:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 [[I_SECOND]]
393+
; CHECK-NEXT: store i32 [[TMP0]], i32* [[BI]], align 4
394+
; CHECK-NEXT: br label [[FOR_SECOND_LATCH]]
395+
; CHECK: for.second.latch:
396+
; CHECK-NEXT: [[INC_FIRST]] = add nsw i64 [[I_FIRST]], 1
397+
; CHECK-NEXT: [[CMP_FIRST:%.*]] = icmp slt i64 [[INC_FIRST]], 100
398+
; CHECK-NEXT: [[INC_SECOND]] = add nsw i64 [[I_SECOND]], 1
399+
; CHECK-NEXT: [[CMP_SECOND:%.*]] = icmp slt i64 [[INC_SECOND]], 100
400+
; CHECK-NEXT: br i1 [[CMP_SECOND]], label [[FOR_FIRST]], label [[FOR_END:%.*]]
401+
; CHECK: for.end:
402+
; CHECK-NEXT: ret void
403+
;
279404
entry:
280405
br label %for.first
281406

@@ -310,16 +435,26 @@ for.end:
310435
; Test that `%add` is moved in basic block entry, and the two loops for.first
311436
; and for.second are fused.
312437

313-
; CHECK: i32 @moveinsts_preheader
314-
; CHECK-LABEL: entry:
315-
; CHECK-NEXT: %add = add nsw i32 %x, 1
316-
; CHECK-NEXT: br label %for.first
317-
; CHECK-LABEL: for.first:
318-
; CHECK: br i1 %cmp.j, label %for.first, label %for.second.exit
319-
; CHECK-LABEL: for.second.exit:
320-
; CHECK-NEXT: ret i32 %add
321-
322438
define i32 @moveinsts_preheader(i32* %A, i32 %x) {
439+
; CHECK-LABEL: @moveinsts_preheader(
440+
; CHECK-NEXT: entry:
441+
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[X:%.*]], 1
442+
; CHECK-NEXT: br label [[FOR_FIRST:%.*]]
443+
; CHECK: for.first:
444+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC_I:%.*]], [[FOR_FIRST]] ]
445+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[INC_J:%.*]], [[FOR_FIRST]] ]
446+
; CHECK-NEXT: [[AI:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[I]]
447+
; CHECK-NEXT: store i32 0, i32* [[AI]], align 4
448+
; CHECK-NEXT: [[INC_I]] = add nsw i64 [[I]], 1
449+
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i64 [[INC_I]], 100
450+
; CHECK-NEXT: [[AJ:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[J]]
451+
; CHECK-NEXT: store i32 2, i32* [[AJ]], align 4
452+
; CHECK-NEXT: [[INC_J]] = add nsw i64 [[J]], 1
453+
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i64 [[INC_J]], 100
454+
; CHECK-NEXT: br i1 [[CMP_J]], label [[FOR_FIRST]], label [[FOR_SECOND_EXIT:%.*]]
455+
; CHECK: for.second.exit:
456+
; CHECK-NEXT: ret i32 [[ADD]]
457+
;
323458
entry:
324459
br label %for.first
325460

@@ -351,20 +486,30 @@ for.second.exit:
351486
; defined after basic block entry. And the two loops for.first and for.second
352487
; are not fused.
353488

354-
; CHECK: i64 @unsafe_preheader
355-
; CHECK-LABEL: entry:
356-
; CHECK-NEXT: br label %for.first
357-
; CHECK-LABEL: for.first:
358-
; CHECK: br i1 %cmp.i, label %for.first, label %for.first.exit
359-
; CHECK-LABEL: for.first.exit:
360-
; CHECK-NEXT: %add = add nsw i64 %x, %i
361-
; CHECK-NEXT: br label %for.second
362-
; CHECK-LABEL: for.second:
363-
; CHECK: br i1 %cmp.j, label %for.second, label %for.second.exit
364-
; CHECK-LABEL: for.second.exit:
365-
; CHECK-NEXT: ret i64 %add
366-
367489
define i64 @unsafe_preheader(i32* %A, i64 %x) {
490+
; CHECK-LABEL: @unsafe_preheader(
491+
; CHECK-NEXT: entry:
492+
; CHECK-NEXT: br label [[FOR_FIRST:%.*]]
493+
; CHECK: for.first:
494+
; CHECK-NEXT: [[I:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC_I:%.*]], [[FOR_FIRST]] ]
495+
; CHECK-NEXT: [[AI:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i64 [[I]]
496+
; CHECK-NEXT: store i32 0, i32* [[AI]], align 4
497+
; CHECK-NEXT: [[INC_I]] = add nsw i64 [[I]], 1
498+
; CHECK-NEXT: [[CMP_I:%.*]] = icmp slt i64 [[INC_I]], 100
499+
; CHECK-NEXT: br i1 [[CMP_I]], label [[FOR_FIRST]], label [[FOR_FIRST_EXIT:%.*]]
500+
; CHECK: for.first.exit:
501+
; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[X:%.*]], [[I]]
502+
; CHECK-NEXT: br label [[FOR_SECOND:%.*]]
503+
; CHECK: for.second:
504+
; CHECK-NEXT: [[J:%.*]] = phi i64 [ 0, [[FOR_FIRST_EXIT]] ], [ [[INC_J:%.*]], [[FOR_SECOND]] ]
505+
; CHECK-NEXT: [[AJ:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[J]]
506+
; CHECK-NEXT: store i32 2, i32* [[AJ]], align 4
507+
; CHECK-NEXT: [[INC_J]] = add nsw i64 [[J]], 1
508+
; CHECK-NEXT: [[CMP_J:%.*]] = icmp slt i64 [[INC_J]], 100
509+
; CHECK-NEXT: br i1 [[CMP_J]], label [[FOR_SECOND]], label [[FOR_SECOND_EXIT:%.*]]
510+
; CHECK: for.second.exit:
511+
; CHECK-NEXT: ret i64 [[ADD]]
512+
;
368513
entry:
369514
br label %for.first
370515

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