[AArch64][GlobalISel] Handle fp constant splats

This changes the DUP(constant) -> MOVI code to handle either integer or fp
types, allowing more constant to be selected, and fixes up some cases where fp
constants were being incorrectly selected.

Author: davemgreen

llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp

@@ -2251,7 +2251,7 @@ bool AArch64InstructionSelector::earlySelect(MachineInstr &I) {
     // Before selecting a DUP instruction, check if it is better selected as a
     // MOV or load from a constant pool.
     Register Src = I.getOperand(1).getReg();
-    auto ValAndVReg = getIConstantVRegValWithLookThrough(Src, MRI);
+    auto ValAndVReg = getAnyConstantVRegValWithLookThrough(Src, MRI);
     if (!ValAndVReg)
       return false;
     LLVMContext &Ctx = MF.getFunction().getContext();
@@ -5600,8 +5600,7 @@ MachineInstr *AArch64InstructionSelector::tryAdvSIMDModImmFP(
   if (DstSize == 128) {
     if (Bits.getHiBits(64) != Bits.getLoBits(64))
       return nullptr;
-    // Need to deal with 4f32
-    Op = AArch64::FMOVv2f64_ns;
+    Op = AArch64::FMOVv4f32_ns;
     IsWide = true;
   } else {
     Op = AArch64::FMOVv2f32_ns;
@@ -5610,9 +5609,10 @@ MachineInstr *AArch64InstructionSelector::tryAdvSIMDModImmFP(
   uint64_t Val = Bits.zextOrTrunc(64).getZExtValue();
 
   if (AArch64_AM::isAdvSIMDModImmType11(Val)) {
-    Val = AArch64_AM::encodeAdvSIMDModImmType7(Val);
+    Val = AArch64_AM::encodeAdvSIMDModImmType11(Val);
   } else if (IsWide && AArch64_AM::isAdvSIMDModImmType12(Val)) {
     Val = AArch64_AM::encodeAdvSIMDModImmType12(Val);
+    Op = AArch64::FMOVv2f64_ns;
   } else
     return nullptr;
 

llvm/test/CodeGen/AArch64/GlobalISel/select-to-fmin-fmax.ll

@@ -39,8 +39,7 @@ entry:
 define <4 x half> @test_v4s16(<4 x half> %a) #0 {
 ; CHECK-LABEL: test_v4s16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.4h, v1.h[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.4h, v1.4h, v0.4h
 ; CHECK-NEXT:    ret
 entry:
@@ -52,8 +51,7 @@ entry:
 define <8 x half> @test_v8s16(<8 x half> %a) #0 {
 ; CHECK-LABEL: test_v8s16:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.8h, v1.h[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.8h, v1.8h, v0.8h
 ; CHECK-NEXT:    ret
 entry:
@@ -65,8 +63,7 @@ entry:
 define <2 x float> @test_v2s32(<2 x float> %a) #0 {
 ; CHECK-LABEL: test_v2s32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.2s, v1.s[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.2s, v1.2s, v0.2s
 ; CHECK-NEXT:    ret
 entry:
@@ -78,8 +75,7 @@ entry:
 define <4 x float> @test_v4s32(<4 x float> %a) #0 {
 ; CHECK-LABEL: test_v4s32:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.4s, v1.s[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.4s, v1.4s, v0.4s
 ; CHECK-NEXT:    ret
 entry:
@@ -91,8 +87,7 @@ entry:
 define <2 x double> @test_v2s64(<2 x double> %a) #0 {
 ; CHECK-LABEL: test_v2s64:
 ; CHECK:       // %bb.0: // %entry
-; CHECK-NEXT:    movi d1, #0000000000000000
-; CHECK-NEXT:    dup v1.2d, v1.d[0]
+; CHECK-NEXT:    movi v1.2d, #0000000000000000
 ; CHECK-NEXT:    fmax v0.2d, v1.2d, v0.2d
 ; CHECK-NEXT:    ret
 entry:

llvm/test/CodeGen/AArch64/neon-mov.ll

@@ -305,44 +305,26 @@ define <1 x i64> @movid() {
 }
 
 define <2 x float> @fmov2s() {
-; CHECK-SD-LABEL: fmov2s:
-; CHECK-SD:       // %bb.0:
-; CHECK-SD-NEXT:    fmov v0.2s, #-12.00000000
-; CHECK-SD-NEXT:    ret
-;
-; CHECK-GI-LABEL: fmov2s:
-; CHECK-GI:       // %bb.0:
-; CHECK-GI-NEXT:    fmov s0, #-12.00000000
-; CHECK-GI-NEXT:    dup v0.2s, v0.s[0]
-; CHECK-GI-NEXT:    ret
+; CHECK-LABEL: fmov2s:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fmov v0.2s, #-12.00000000
+; CHECK-NEXT:    ret
 	ret <2 x float> < float -1.2e1, float -1.2e1>
 }
 
 define <4 x float> @fmov4s() {
-; CHECK-SD-LABEL: fmov4s:
-; CHECK-SD:       // %bb.0:
-; CHECK-SD-NEXT:    fmov v0.4s, #-12.00000000
-; CHECK-SD-NEXT:    ret
-;
-; CHECK-GI-LABEL: fmov4s:
-; CHECK-GI:       // %bb.0:
-; CHECK-GI-NEXT:    fmov s0, #-12.00000000
-; CHECK-GI-NEXT:    dup v0.4s, v0.s[0]
-; CHECK-GI-NEXT:    ret
+; CHECK-LABEL: fmov4s:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fmov v0.4s, #-12.00000000
+; CHECK-NEXT:    ret
 	ret <4 x float> < float -1.2e1, float -1.2e1, float -1.2e1, float -1.2e1>
 }
 
 define <2 x double> @fmov2d() {
-; CHECK-SD-LABEL: fmov2d:
-; CHECK-SD:       // %bb.0:
-; CHECK-SD-NEXT:    fmov v0.2d, #-12.00000000
-; CHECK-SD-NEXT:    ret
-;
-; CHECK-GI-LABEL: fmov2d:
-; CHECK-GI:       // %bb.0:
-; CHECK-GI-NEXT:    fmov d0, #-12.00000000
-; CHECK-GI-NEXT:    dup v0.2d, v0.d[0]
-; CHECK-GI-NEXT:    ret
+; CHECK-LABEL: fmov2d:
+; CHECK:       // %bb.0:
+; CHECK-NEXT:    fmov v0.2d, #-12.00000000
+; CHECK-NEXT:    ret
 	ret <2 x double> < double -1.2e1, double -1.2e1>
 }