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[SPARC] Print target address when disassembling branches and calls (#140340)
Similar to https://reviews.llvm.org/D93241, print target addresses instead of raw offset values when disassembling branches and calls. Should fix #122196 and #139284.
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9 files changed

+126
-73
lines changed

‎llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp

Lines changed: 19 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -263,7 +263,10 @@ static DecodeStatus DecodeCall(MCInst &Inst, unsigned insn, uint64_t Address,
263263
const MCDisassembler *Decoder);
264264
static DecodeStatus DecodeSIMM13(MCInst &Inst, unsigned insn, uint64_t Address,
265265
const MCDisassembler *Decoder);
266-
266+
template <unsigned N>
267+
constexpr static DecodeStatus DecodeDisp(MCInst &MI, uint32_t ImmVal,
268+
uint64_t Address,
269+
const MCDisassembler *Decoder);
267270
#include "SparcGenDisassemblerTables.inc"
268271

269272
/// Read four bytes from the ArrayRef and return 32 bit word.
@@ -326,11 +329,10 @@ static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch,
326329

327330
static DecodeStatus DecodeCall(MCInst &MI, unsigned insn, uint64_t Address,
328331
const MCDisassembler *Decoder) {
329-
unsigned tgt = fieldFromInstruction(insn, 0, 30);
330-
tgt <<= 2;
331-
if (!tryAddingSymbolicOperand(tgt+Address, false, Address,
332-
0, 30, MI, Decoder))
333-
MI.addOperand(MCOperand::createImm(tgt));
332+
int64_t CallOffset = SignExtend64(fieldFromInstruction(insn, 0, 30), 30) * 4;
333+
if (!tryAddingSymbolicOperand(Address + CallOffset, false, Address, 0, 30, MI,
334+
Decoder))
335+
MI.addOperand(MCOperand::createImm(CallOffset));
334336
return MCDisassembler::Success;
335337
}
336338

@@ -340,3 +342,14 @@ static DecodeStatus DecodeSIMM13(MCInst &MI, unsigned insn, uint64_t Address,
340342
MI.addOperand(MCOperand::createImm(SignExtend64<13>(insn)));
341343
return MCDisassembler::Success;
342344
}
345+
346+
template <unsigned N>
347+
constexpr static DecodeStatus DecodeDisp(MCInst &MI, uint32_t ImmVal,
348+
uint64_t Address,
349+
const MCDisassembler *Decoder) {
350+
int64_t BranchOffset = SignExtend64(ImmVal, N) * 4;
351+
if (!tryAddingSymbolicOperand(Address + BranchOffset, true, Address, 0, N, MI,
352+
Decoder))
353+
MI.addOperand(MCOperand::createImm(BranchOffset));
354+
return MCDisassembler::Success;
355+
}

‎llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp

Lines changed: 27 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -263,3 +263,30 @@ void SparcInstPrinter::printPrefetchTag(const MCInst *MI, int opNum,
263263
else
264264
O << Imm;
265265
}
266+
267+
void SparcInstPrinter::printCTILabel(const MCInst *MI, uint64_t Address,
268+
unsigned OpNum, const MCSubtargetInfo &STI,
269+
raw_ostream &O) {
270+
const MCOperand &Op = MI->getOperand(OpNum);
271+
272+
// If the label has already been resolved to an immediate offset (say, when
273+
// we're running the disassembler), just print the immediate.
274+
if (Op.isImm()) {
275+
int64_t Offset = Op.getImm();
276+
if (PrintBranchImmAsAddress) {
277+
uint64_t Target = Address + Offset;
278+
if (STI.getTargetTriple().isSPARC32())
279+
Target &= 0xffffffff;
280+
O << formatHex(Target);
281+
} else {
282+
O << ".";
283+
if (Offset >= 0)
284+
O << "+";
285+
O << Offset;
286+
}
287+
return;
288+
}
289+
290+
// Otherwise, just print the expression.
291+
Op.getExpr()->print(O, &MAI);
292+
}

‎llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,8 @@ class SparcInstPrinter : public MCInstPrinter {
3737
getMnemonic(const MCInst &MI) const override;
3838
void printInstruction(const MCInst *MI, uint64_t Address,
3939
const MCSubtargetInfo &STI, raw_ostream &O);
40+
void printCTILabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
41+
const MCSubtargetInfo &STI, raw_ostream &O);
4042
bool printAliasInstr(const MCInst *MI, uint64_t Address,
4143
const MCSubtargetInfo &STI, raw_ostream &O);
4244
void printCustomAliasOperand(const MCInst *MI, uint64_t Address,

‎llvm/lib/Target/Sparc/SparcInstrInfo.td

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -227,14 +227,23 @@ def PrefetchTag : Operand<i32> {
227227
// Branch targets have OtherVT type.
228228
def brtarget : Operand<OtherVT> {
229229
let EncoderMethod = "getBranchTargetOpValue";
230+
let DecoderMethod = "DecodeDisp<22>";
231+
let PrintMethod = "printCTILabel";
232+
let OperandType = "OPERAND_PCREL";
230233
}
231234

232235
def bprtarget : Operand<OtherVT> {
233236
let EncoderMethod = "getBranchPredTargetOpValue";
237+
let DecoderMethod = "DecodeDisp<19>";
238+
let PrintMethod = "printCTILabel";
239+
let OperandType = "OPERAND_PCREL";
234240
}
235241

236242
def bprtarget16 : Operand<OtherVT> {
237243
let EncoderMethod = "getBranchOnRegTargetOpValue";
244+
let DecoderMethod = "DecodeDisp<16>";
245+
let PrintMethod = "printCTILabel";
246+
let OperandType = "OPERAND_PCREL";
238247
}
239248

240249
def SparcCallTargetAsmOperand : AsmOperandClass {
@@ -246,6 +255,8 @@ def calltarget : Operand<i32> {
246255
let EncoderMethod = "getCallTargetOpValue";
247256
let DecoderMethod = "DecodeCall";
248257
let ParserMatchClass = SparcCallTargetAsmOperand;
258+
let PrintMethod = "printCTILabel";
259+
let OperandType = "OPERAND_PCREL";
249260
}
250261

251262
// Operand for printing out a condition code.

‎llvm/test/MC/Disassembler/Sparc/sparc.txt

Lines changed: 45 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -81,142 +81,142 @@
8181
# CHECK: subxcc %g1, %g2, %g3
8282
0x86 0xe0 0x40 0x02
8383

84-
# CHECK: ba 4194303
84+
# CHECK: ba .-4
8585
0x10 0xbf 0xff 0xff
8686

87-
# CHECK: bne 4194303
87+
# CHECK: bne .-4
8888
0x12 0xbf 0xff 0xff
8989

90-
# CHECK: be 4194303
90+
# CHECK: be .-4
9191
0x02 0xbf 0xff 0xff
9292

93-
# CHECK: bg 4194303
93+
# CHECK: bg .-4
9494
0x14 0xbf 0xff 0xff
9595

96-
# CHECK: ble 4194303
96+
# CHECK: ble .-4
9797
0x04 0xbf 0xff 0xff
9898

99-
# CHECK: bge 4194303
99+
# CHECK: bge .-4
100100
0x16 0xbf 0xff 0xff
101101

102-
# CHECK: bl 4194303
102+
# CHECK: bl .-4
103103
0x06 0xbf 0xff 0xff
104104

105-
# CHECK: bgu 4194303
105+
# CHECK: bgu .-4
106106
0x18 0xbf 0xff 0xff
107107

108-
# CHECK: bleu 4194303
108+
# CHECK: bleu .-4
109109
0x08 0xbf 0xff 0xff
110110

111-
# CHECK: bcc 4194303
111+
# CHECK: bcc .-4
112112
0x1a 0xbf 0xff 0xff
113113

114-
# CHECK: bcs 4194303
114+
# CHECK: bcs .-4
115115
0x0a 0xbf 0xff 0xff
116116

117-
# CHECK: bpos 4194303
117+
# CHECK: bpos .-4
118118
0x1c 0xbf 0xff 0xff
119119

120-
# CHECK: bneg 4194303
120+
# CHECK: bneg .-4
121121
0x0c 0xbf 0xff 0xff
122122

123-
# CHECK: bvc 4194303
123+
# CHECK: bvc .-4
124124
0x1e 0xbf 0xff 0xff
125125

126-
# CHECK: bvs 4194303
126+
# CHECK: bvs .-4
127127
0x0e 0xbf 0xff 0xff
128128

129-
# CHECK: fbu 4194303
129+
# CHECK: fbu .-4
130130
0x0f 0xbf 0xff 0xff
131131

132-
# CHECK: fbg 4194303
132+
# CHECK: fbg .-4
133133
0x0d 0xbf 0xff 0xff
134134

135-
# CHECK: fbug 4194303
135+
# CHECK: fbug .-4
136136
0x0b 0xbf 0xff 0xff
137137

138-
# CHECK: fbl 4194303
138+
# CHECK: fbl .-4
139139
0x09 0xbf 0xff 0xff
140140

141-
# CHECK: fbul 4194303
141+
# CHECK: fbul .-4
142142
0x07 0xbf 0xff 0xff
143143

144-
# CHECK: fblg 4194303
144+
# CHECK: fblg .-4
145145
0x05 0xbf 0xff 0xff
146146

147-
# CHECK: fbne 4194303
147+
# CHECK: fbne .-4
148148
0x03 0xbf 0xff 0xff
149149

150-
# CHECK: fbe 4194303
150+
# CHECK: fbe .-4
151151
0x13 0xbf 0xff 0xff
152152

153-
# CHECK: fbue 4194303
153+
# CHECK: fbue .-4
154154
0x15 0xbf 0xff 0xff
155155

156-
# CHECK: fbge 4194303
156+
# CHECK: fbge .-4
157157
0x17 0xbf 0xff 0xff
158158

159-
# CHECK: fbuge 4194303
159+
# CHECK: fbuge .-4
160160
0x19 0xbf 0xff 0xff
161161

162-
# CHECK: fble 4194303
162+
# CHECK: fble .-4
163163
0x1b 0xbf 0xff 0xff
164164

165-
# CHECK: fbule 4194303
165+
# CHECK: fbule .-4
166166
0x1d 0xbf 0xff 0xff
167167

168-
# CHECK: fbo 4194303
168+
# CHECK: fbo .-4
169169
0x1f 0xbf 0xff 0xff
170170

171-
# CHECK: cba 4194303
171+
# CHECK: cba .-4
172172
0x11 0xff 0xff 0xff
173173

174-
# CHECK: cbn 4194303
174+
# CHECK: cbn .-4
175175
0x01 0xff 0xff 0xff
176176

177-
# CHECK: cb3 4194303
177+
# CHECK: cb3 .-4
178178
0x0f 0xff 0xff 0xff
179179

180-
# CHECK: cb2 4194303
180+
# CHECK: cb2 .-4
181181
0x0d 0xff 0xff 0xff
182182

183-
# CHECK: cb23 4194303
183+
# CHECK: cb23 .-4
184184
0x0b 0xff 0xff 0xff
185185

186-
# CHECK: cb1 4194303
186+
# CHECK: cb1 .-4
187187
0x09 0xff 0xff 0xff
188188

189-
# CHECK: cb13 4194303
189+
# CHECK: cb13 .-4
190190
0x07 0xff 0xff 0xff
191191

192-
# CHECK: cb12 4194303
192+
# CHECK: cb12 .-4
193193
0x05 0xff 0xff 0xff
194194

195-
# CHECK: cb123 4194303
195+
# CHECK: cb123 .-4
196196
0x03 0xff 0xff 0xff
197197

198-
# CHECK: cb03 4194303
198+
# CHECK: cb03 .-4
199199
0x15 0xff 0xff 0xff
200200

201-
# CHECK: cb02 4194303
201+
# CHECK: cb02 .-4
202202
0x17 0xff 0xff 0xff
203203

204-
# CHECK: cb023 4194303
204+
# CHECK: cb023 .-4
205205
0x19 0xff 0xff 0xff
206206

207-
# CHECK: cb01 4194303
207+
# CHECK: cb01 .-4
208208
0x1b 0xff 0xff 0xff
209209

210-
# CHECK: cb013 4194303
210+
# CHECK: cb013 .-4
211211
0x1d 0xff 0xff 0xff
212212

213-
# CHECK: cb012 4194303
213+
# CHECK: cb012 .-4
214214
0x1f 0xff 0xff 0xff
215215

216216
# CHECK: restore
217217
0x81 0xe8 0x00 0x00
218218

219-
# CHECK: call 16
219+
# CHECK: call .+16
220220
0x40 0x00 0x00 0x04
221221

222222
# CHECK: add %g1, -10, %g2

‎llvm/test/MC/Sparc/Misc/little-endian.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13,5 +13,5 @@
1313
! ...and that fixups are applied to the correct bytes.
1414

1515
! CHECK: ba .BB0 ! encoding: [A,A,0b10AAAAAA,0x10]
16-
! CHECK-OBJ: 4: ff ff bf 10 ba 0x3fffff
16+
! CHECK-OBJ: 4: ff ff bf 10 ba 0x0
1717
ba .BB0

‎llvm/test/MC/Sparc/Relocations/expr.s

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
mov ((12+3)<<2), %o2
88

99
! CHECK: ba symStart+4
10-
! OBJDUMP: ba 0x1
10+
! OBJDUMP: ba 0xc
1111
symStart:
1212
b symStart + 4
1313

‎llvm/test/MC/Sparc/Relocations/relocation.s

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -7,9 +7,9 @@
77
# ASM: call local1
88
# ASM-NEXT: call undef
99
# OBJDUMP: call 0x14
10-
# OBJDUMP-NEXT: call 0x0
10+
# OBJDUMP-NEXT: call 0x4
1111
# OBJDUMP-NEXT: R_SPARC_WDISP30 .text1+0x4
12-
# OBJDUMP-NEXT: call 0x0
12+
# OBJDUMP-NEXT: call 0x8
1313
# OBJDUMP-NEXT: R_SPARC_WDISP30 undef{{$}}
1414
call local
1515
call local1
@@ -28,15 +28,15 @@ local:
2828

2929
# ASM: brz %g1, undef
3030
# ASM: brlz %g1, .Ltmp{{.}}-8
31-
# OBJDUMP: brz %g1, 0x0
31+
# OBJDUMP: brz %g1, 0x14
3232
# OBJDUMP-NEXT: R_SPARC_WDISP16 undef
33-
# OBJDUMP-NEXT: brlz %g1, 0xfffe
34-
# OBJDUMP-NEXT: bg %icc, 0x0
33+
# OBJDUMP-NEXT: brlz %g1, 0x10
34+
# OBJDUMP-NEXT: bg %icc, 0x1c
3535
# OBJDUMP-NEXT: R_SPARC_WDISP19 undef
36-
# OBJDUMP-NEXT: bg %icc, 0x7fffe
37-
# OBJDUMP-NEXT: cbn 0x0
36+
# OBJDUMP-NEXT: bg %icc, 0x18
37+
# OBJDUMP-NEXT: cbn 0x24
3838
# OBJDUMP-NEXT: R_SPARC_WDISP22 undef
39-
# OBJDUMP-NEXT: cbn 0x3ffffe
39+
# OBJDUMP-NEXT: cbn 0x20
4040
brz %g1, undef
4141
brlz %g1, .-8
4242
bg %icc, undef

‎llvm/test/MC/Sparc/sparc64-bpr-offset.s

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -4,25 +4,25 @@
44
!! make sure that our offset bits don't trample on other fields.
55
!! This is particularly important with backwards branches.
66

7-
! BIN: 0: 02 c8 40 01 brz %g1, 1
8-
! BIN: 4: 04 c8 40 01 brlez %g1, 1
9-
! BIN: 8: 06 c8 40 01 brlz %g1, 1
10-
! BIN: c: 0a c8 40 01 brnz %g1, 1
11-
! BIN: 10: 0c c8 40 01 brgz %g1, 1
12-
! BIN: 14: 0e c8 40 01 brgez %g1, 1
7+
! BIN: 0: 02 c8 40 01 brz %g1, 0x4
8+
! BIN: 4: 04 c8 40 01 brlez %g1, 0x8
9+
! BIN: 8: 06 c8 40 01 brlz %g1, 0xc
10+
! BIN: c: 0a c8 40 01 brnz %g1, 0x10
11+
! BIN: 10: 0c c8 40 01 brgz %g1, 0x14
12+
! BIN: 14: 0e c8 40 01 brgez %g1, 0x18
1313
brz %g1, .+4
1414
brlez %g1, .+4
1515
brlz %g1, .+4
1616
brnz %g1, .+4
1717
brgz %g1, .+4
1818
brgez %g1, .+4
1919

20-
! BIN: 18: 02 f8 7f ff brz %g1, 65535
21-
! BIN: 1c: 04 f8 7f ff brlez %g1, 65535
22-
! BIN: 20: 06 f8 7f ff brlz %g1, 65535
23-
! BIN: 24: 0a f8 7f ff brnz %g1, 65535
24-
! BIN: 28: 0c f8 7f ff brgz %g1, 65535
25-
! BIN: 2c: 0e f8 7f ff brgez %g1, 65535
20+
! BIN: 18: 02 f8 7f ff brz %g1, 0x14
21+
! BIN: 1c: 04 f8 7f ff brlez %g1, 0x18
22+
! BIN: 20: 06 f8 7f ff brlz %g1, 0x1c
23+
! BIN: 24: 0a f8 7f ff brnz %g1, 0x20
24+
! BIN: 28: 0c f8 7f ff brgz %g1, 0x24
25+
! BIN: 2c: 0e f8 7f ff brgez %g1, 0x28
2626
brz %g1, .-4
2727
brlez %g1, .-4
2828
brlz %g1, .-4

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