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[NFC] Add additional checks to test for vec_pack_to_short_fp32 (#130324)
Update test in prep for IR changes that will be introduced in #129923
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clang/test/CodeGen/PowerPC/builtins-ppc-p9vector.c

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@@ -853,10 +853,16 @@ vector unsigned char test73(void) {
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vector unsigned short test74(void) {
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// CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
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// CHECK-BE: @llvm.ppc.vsx.xvcvsphp(<4 x float>
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// CHECK-BE: @llvm.ppc.altivec.vperm
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// CHECK-BE: [[REG0:%[0-9]+]] = call <4 x i32> @llvm.ppc.altivec.vperm
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// CHECK-BE-NEXT: [[REG1:%[0-9]+]] = bitcast <4 x i32> [[REG0]] to <4 x float>
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// CHECK-BE-NEXT: [[REG2:%[0-9]+]] = bitcast <4 x float> [[REG1]] to <8 x i16>
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// CHECK-BE-NEXT: ret <8 x i16> [[REG2]]
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// CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
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// CHECK: @llvm.ppc.vsx.xvcvsphp(<4 x float>
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// CHECK: @llvm.ppc.altivec.vperm
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// CHECK: [[REG0:%[0-9]+]] = call <4 x i32> @llvm.ppc.altivec.vperm
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// CHECK-NEXT: [[REG1:%[0-9]+]] = bitcast <4 x i32> [[REG0]] to <4 x float>
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// CHECK-NEXT: [[REG2:%[0-9]+]] = bitcast <4 x float> [[REG1]] to <8 x i16>
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// CHECK-NEXT: ret <8 x i16> [[REG2]]
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return vec_pack_to_short_fp32(vfa, vfb);
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}
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vector unsigned int test75(void) {

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