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[X86] Only call combineBitcastToBoolVector after legalization (#123386)
Prevents infinite loop between combineBitcastToBoolVector and hoistLogicOpWithSameOpcodeHands, which only performs the "logicop(bitcast(A),bitcast(B)) -> bitcast(logicop(A,B))" upto type legalization. combineBitcastToBoolVector doesn't care much as its mainly for AVX512 cleanup that X86DomainReassignment can't handle for us. Fixes #123333
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llvm/lib/Target/X86/X86ISelLowering.cpp

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@@ -45062,7 +45062,7 @@ static SDValue combineBitcast(SDNode *N, SelectionDAG &DAG,
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N0 = DAG.getBitcast(MVT::i8, N0);
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return DAG.getNode(ISD::TRUNCATE, dl, VT, N0);
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}
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} else {
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} else if (DCI.isAfterLegalizeDAG()) {
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// If we're bitcasting from iX to vXi1, see if the integer originally
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// began as a vXi1 and whether we can remove the bitcast entirely.
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if (VT.isVector() && VT.getScalarType() == MVT::i1 &&

llvm/test/CodeGen/X86/pr123333.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
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define void @PR123333(ptr %in0, ptr %in1, ptr %in2, ptr %out0, ptr %out1) {
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; CHECK-LABEL: PR123333:
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; CHECK: # %bb.0:
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; CHECK-NEXT: kmovq (%rsi), %k0
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; CHECK-NEXT: kmovq (%rdi), %k1
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; CHECK-NEXT: korq %k1, %k0, %k2
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; CHECK-NEXT: vmovdqu8 (%rdx), %zmm0 {%k2} {z}
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; CHECK-NEXT: vmovdqu64 %zmm0, (%rcx)
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; CHECK-NEXT: kandnq %k0, %k1, %k0
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; CHECK-NEXT: knotq %k0, %k1
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; CHECK-NEXT: vmovdqu8 {{.*#+}} zmm0 {%k1} {z} = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
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; CHECK-NEXT: vmovdqu64 %zmm0, (%r8)
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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%i0 = load i64, ptr %in0, align 8
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%i1 = load i64, ptr %in1, align 8
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%i2 = load <64 x i8>, ptr %in2, align 1
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%i7 = bitcast i64 %i1 to <64 x i1>
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%i9 = bitcast i64 %i0 to <64 x i1>
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%i12 = or i64 %i1, %i0
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%i13 = bitcast i64 %i12 to <64 x i1>
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%i15 = or <64 x i1> %i13, %i9
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%i17 = select <64 x i1> %i15, <64 x i8> %i2, <64 x i8> zeroinitializer
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store <64 x i8> %i17, ptr %out0, align 16
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%i21 = icmp eq <64 x i8> %i2, splat (i8 4)
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%i22 = xor <64 x i1> %i9, splat (i1 true)
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%i23 = and <64 x i1> %i22, %i7
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%i25 = select <64 x i1> %i23, <64 x i8> zeroinitializer, <64 x i8> splat (i8 15)
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store <64 x i8> %i25, ptr %out1, align 16
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ret void
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}

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