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[VPlan][NFC] Use patterns in test check (#111086)
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‎llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll

Lines changed: 64 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -53,41 +53,41 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
5353
; CHECK-NEXT: LV: Scalarizing: %cmp = icmp ugt i64 %indvars.iv, 1
5454
; CHECK-NEXT: LV: Scalarizing: %indvars.iv.next = add nsw i64 %indvars.iv, -1
5555
; CHECK-NEXT: VPlan 'Initial VPlan for VF={vscale x 4},UF>=1' {
56-
; CHECK-NEXT: Live-in vp<%0> = VF * UF
57-
; CHECK-NEXT: Live-in vp<%1> = vector-trip-count
58-
; CHECK-NEXT: vp<%2> = original trip-count
56+
; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF
57+
; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
58+
; CHECK-NEXT: vp<[[TC:%.+]]> = original trip-count
5959
; CHECK-EMPTY:
6060
; CHECK-NEXT: ir-bb<for.body.preheader>:
6161
; CHECK-NEXT: IR %0 = zext i32 %n to i64
62-
; CHECK-NEXT: EMIT vp<%2> = EXPAND SCEV (zext i32 %n to i64)
62+
; CHECK-NEXT: EMIT vp<[[TC]]> = EXPAND SCEV (zext i32 %n to i64)
6363
; CHECK-NEXT: No successors
6464
; CHECK-EMPTY:
6565
; CHECK-NEXT: vector.ph:
6666
; CHECK-NEXT: Successor(s): vector loop
6767
; CHECK-EMPTY:
6868
; CHECK-NEXT: <x1> vector loop: {
6969
; CHECK-NEXT: vector.body:
70-
; CHECK-NEXT: EMIT vp<%3> = CANONICAL-INDUCTION ir<0>, vp<%8>
71-
; CHECK-NEXT: vp<%4> = DERIVED-IV ir<%n> + vp<%3> * ir<-1>
72-
; CHECK-NEXT: vp<%5> = SCALAR-STEPS vp<%4>, ir<-1>
73-
; CHECK-NEXT: CLONE ir<%i.0> = add nsw vp<%5>, ir<-1>
70+
; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
71+
; CHECK-NEXT: vp<[[DEV_IV:%.+]]> = DERIVED-IV ir<%n> + vp<[[CAN_IV]]> * ir<-1>
72+
; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[DEV_IV]]>, ir<-1>
73+
; CHECK-NEXT: CLONE ir<%i.0> = add nsw vp<[[STEPS]]>, ir<-1>
7474
; CHECK-NEXT: CLONE ir<%idxprom> = zext ir<%i.0>
7575
; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr inbounds ir<%B>, ir<%idxprom>
76-
; CHECK-NEXT: vp<%6> = vector-pointer (reverse) ir<%arrayidx>
77-
; CHECK-NEXT: WIDEN ir<%1> = load vp<%6>
76+
; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer (reverse) ir<%arrayidx>
77+
; CHECK-NEXT: WIDEN ir<%1> = load vp<[[VEC_PTR]]>
7878
; CHECK-NEXT: WIDEN ir<%add9> = add ir<%1>, ir<1>
7979
; CHECK-NEXT: CLONE ir<%arrayidx3> = getelementptr inbounds ir<%A>, ir<%idxprom>
80-
; CHECK-NEXT: vp<%7> = vector-pointer (reverse) ir<%arrayidx3>
81-
; CHECK-NEXT: WIDEN store vp<%7>, ir<%add9>
82-
; CHECK-NEXT: EMIT vp<%8> = add nuw vp<%3>, vp<%0>
83-
; CHECK-NEXT: EMIT branch-on-count vp<%8>, vp<%1>
80+
; CHECK-NEXT: vp<[[VEC_PTR2:%.+]]> = vector-pointer (reverse) ir<%arrayidx3>
81+
; CHECK-NEXT: WIDEN store vp<[[VEC_PTR2]]>, ir<%add9>
82+
; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
83+
; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>
8484
; CHECK-NEXT: No successors
8585
; CHECK-NEXT: }
8686
; CHECK-NEXT: Successor(s): middle.block
8787
; CHECK-EMPTY:
8888
; CHECK-NEXT: middle.block:
89-
; CHECK-NEXT: EMIT vp<%10> = icmp eq vp<%2>, vp<%1>
90-
; CHECK-NEXT: EMIT branch-on-cond vp<%10>
89+
; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq vp<[[TC]]>, vp<[[VEC_TC]]>
90+
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
9191
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
9292
; CHECK-EMPTY:
9393
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
@@ -137,41 +137,41 @@ define void @vector_reverse_i64(ptr nocapture noundef writeonly %A, ptr nocaptur
137137
; CHECK-NEXT: LEV: Epilogue vectorization is not profitable for this loop
138138
; CHECK-NEXT: Executing best plan with VF=vscale x 4, UF=1
139139
; CHECK-NEXT: VPlan 'Final VPlan for VF={vscale x 4},UF={1}' {
140-
; CHECK-NEXT: Live-in vp<%0> = VF * UF
141-
; CHECK-NEXT: Live-in vp<%1> = vector-trip-count
142-
; CHECK-NEXT: vp<%2> = original trip-count
140+
; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF
141+
; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
142+
; CHECK-NEXT: vp<[[TC:%.+]]> = original trip-count
143143
; CHECK-EMPTY:
144144
; CHECK-NEXT: ir-bb<for.body.preheader>:
145145
; CHECK-NEXT: IR %0 = zext i32 %n to i64
146-
; CHECK-NEXT: EMIT vp<%2> = EXPAND SCEV (zext i32 %n to i64)
146+
; CHECK-NEXT: EMIT vp<[[TC]]> = EXPAND SCEV (zext i32 %n to i64)
147147
; CHECK-NEXT: No successors
148148
; CHECK-EMPTY:
149149
; CHECK-NEXT: vector.ph:
150150
; CHECK-NEXT: Successor(s): vector loop
151151
; CHECK-EMPTY:
152152
; CHECK-NEXT: <x1> vector loop: {
153153
; CHECK-NEXT: vector.body:
154-
; CHECK-NEXT: EMIT vp<%3> = CANONICAL-INDUCTION ir<0>, vp<%8>
155-
; CHECK-NEXT: vp<%4> = DERIVED-IV ir<%n> + vp<%3> * ir<-1>
156-
; CHECK-NEXT: vp<%5> = SCALAR-STEPS vp<%4>, ir<-1>
157-
; CHECK-NEXT: CLONE ir<%i.0> = add nsw vp<%5>, ir<-1>
154+
; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
155+
; CHECK-NEXT: vp<[[DEV_IV:%.+]]> = DERIVED-IV ir<%n> + vp<[[CAN_IV]]> * ir<-1>
156+
; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[DEV_IV]]>, ir<-1>
157+
; CHECK-NEXT: CLONE ir<%i.0> = add nsw vp<[[STEPS]]>, ir<-1>
158158
; CHECK-NEXT: CLONE ir<%idxprom> = zext ir<%i.0>
159159
; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr inbounds ir<%B>, ir<%idxprom>
160-
; CHECK-NEXT: vp<%6> = vector-pointer (reverse) ir<%arrayidx>
161-
; CHECK-NEXT: WIDEN ir<%13> = load vp<%6>
160+
; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer (reverse) ir<%arrayidx>
161+
; CHECK-NEXT: WIDEN ir<%13> = load vp<[[VEC_PTR]]>
162162
; CHECK-NEXT: WIDEN ir<%add9> = add ir<%13>, ir<1>
163163
; CHECK-NEXT: CLONE ir<%arrayidx3> = getelementptr inbounds ir<%A>, ir<%idxprom>
164-
; CHECK-NEXT: vp<%7> = vector-pointer (reverse) ir<%arrayidx3>
165-
; CHECK-NEXT: WIDEN store vp<%7>, ir<%add9>
166-
; CHECK-NEXT: EMIT vp<%8> = add nuw vp<%3>, vp<%0>
167-
; CHECK-NEXT: EMIT branch-on-count vp<%8>, vp<%1>
164+
; CHECK-NEXT: vp<[[VEC_PTR2:%.+]]> = vector-pointer (reverse) ir<%arrayidx3>
165+
; CHECK-NEXT: WIDEN store vp<[[VEC_PTR2]]>, ir<%add9>
166+
; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
167+
; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>
168168
; CHECK-NEXT: No successors
169169
; CHECK-NEXT: }
170170
; CHECK-NEXT: Successor(s): middle.block
171171
; CHECK-EMPTY:
172172
; CHECK-NEXT: middle.block:
173-
; CHECK-NEXT: EMIT vp<%10> = icmp eq vp<%2>, vp<%1>
174-
; CHECK-NEXT: EMIT branch-on-cond vp<%10>
173+
; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq vp<[[TC]]>, vp<[[VEC_TC]]>
174+
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
175175
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
176176
; CHECK-EMPTY:
177177
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
@@ -257,41 +257,41 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
257257
; CHECK-NEXT: LV: Scalarizing: %cmp = icmp ugt i64 %indvars.iv, 1
258258
; CHECK-NEXT: LV: Scalarizing: %indvars.iv.next = add nsw i64 %indvars.iv, -1
259259
; CHECK-NEXT: VPlan 'Initial VPlan for VF={vscale x 4},UF>=1' {
260-
; CHECK-NEXT: Live-in vp<%0> = VF * UF
261-
; CHECK-NEXT: Live-in vp<%1> = vector-trip-count
262-
; CHECK-NEXT: vp<%2> = original trip-count
260+
; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF
261+
; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
262+
; CHECK-NEXT: vp<[[TC:%.+]]> = original trip-count
263263
; CHECK-EMPTY:
264264
; CHECK-NEXT: ir-bb<for.body.preheader>:
265265
; CHECK-NEXT: IR %0 = zext i32 %n to i64
266-
; CHECK-NEXT: EMIT vp<%2> = EXPAND SCEV (zext i32 %n to i64)
266+
; CHECK-NEXT: EMIT vp<[[TC]]> = EXPAND SCEV (zext i32 %n to i64)
267267
; CHECK-NEXT: No successors
268268
; CHECK-EMPTY:
269269
; CHECK-NEXT: vector.ph:
270270
; CHECK-NEXT: Successor(s): vector loop
271271
; CHECK-EMPTY:
272272
; CHECK-NEXT: <x1> vector loop: {
273273
; CHECK-NEXT: vector.body:
274-
; CHECK-NEXT: EMIT vp<%3> = CANONICAL-INDUCTION ir<0>, vp<%8>
275-
; CHECK-NEXT: vp<%4> = DERIVED-IV ir<%n> + vp<%3> * ir<-1>
276-
; CHECK-NEXT: vp<%5> = SCALAR-STEPS vp<%4>, ir<-1>
277-
; CHECK-NEXT: CLONE ir<%i.0> = add nsw vp<%5>, ir<-1>
274+
; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
275+
; CHECK-NEXT: vp<[[DEV_IV:%.+]]> = DERIVED-IV ir<%n> + vp<[[CAN_IV]]> * ir<-1>
276+
; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[DEV_IV]]>, ir<-1>
277+
; CHECK-NEXT: CLONE ir<%i.0> = add nsw vp<[[STEPS]]>, ir<-1>
278278
; CHECK-NEXT: CLONE ir<%idxprom> = zext ir<%i.0>
279279
; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr inbounds ir<%B>, ir<%idxprom>
280-
; CHECK-NEXT: vp<%6> = vector-pointer (reverse) ir<%arrayidx>
281-
; CHECK-NEXT: WIDEN ir<%1> = load vp<%6>
280+
; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer (reverse) ir<%arrayidx>
281+
; CHECK-NEXT: WIDEN ir<%1> = load vp<[[VEC_PTR]]>
282282
; CHECK-NEXT: WIDEN ir<%conv1> = fadd ir<%1>, ir<1.000000e+00>
283283
; CHECK-NEXT: CLONE ir<%arrayidx3> = getelementptr inbounds ir<%A>, ir<%idxprom>
284-
; CHECK-NEXT: vp<%7> = vector-pointer (reverse) ir<%arrayidx3>
285-
; CHECK-NEXT: WIDEN store vp<%7>, ir<%conv1>
286-
; CHECK-NEXT: EMIT vp<%8> = add nuw vp<%3>, vp<%0>
287-
; CHECK-NEXT: EMIT branch-on-count vp<%8>, vp<%1>
284+
; CHECK-NEXT: vp<[[VEC_PTR2:%.+]]> = vector-pointer (reverse) ir<%arrayidx3>
285+
; CHECK-NEXT: WIDEN store vp<[[VEC_PTR2]]>, ir<%conv1>
286+
; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
287+
; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>
288288
; CHECK-NEXT: No successors
289289
; CHECK-NEXT: }
290290
; CHECK-NEXT: Successor(s): middle.block
291291
; CHECK-EMPTY:
292292
; CHECK-NEXT: middle.block:
293-
; CHECK-NEXT: EMIT vp<%10> = icmp eq vp<%2>, vp<%1>
294-
; CHECK-NEXT: EMIT branch-on-cond vp<%10>
293+
; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq vp<[[TC]]>, vp<[[VEC_TC]]>
294+
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
295295
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
296296
; CHECK-EMPTY:
297297
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:
@@ -341,41 +341,41 @@ define void @vector_reverse_f32(ptr nocapture noundef writeonly %A, ptr nocaptur
341341
; CHECK-NEXT: LEV: Epilogue vectorization is not profitable for this loop
342342
; CHECK-NEXT: Executing best plan with VF=vscale x 4, UF=1
343343
; CHECK-NEXT: VPlan 'Final VPlan for VF={vscale x 4},UF={1}' {
344-
; CHECK-NEXT: Live-in vp<%0> = VF * UF
345-
; CHECK-NEXT: Live-in vp<%1> = vector-trip-count
346-
; CHECK-NEXT: vp<%2> = original trip-count
344+
; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF
345+
; CHECK-NEXT: Live-in vp<[[VEC_TC:%.+]]> = vector-trip-count
346+
; CHECK-NEXT: vp<[[TC:%.+]]> = original trip-count
347347
; CHECK-EMPTY:
348348
; CHECK-NEXT: ir-bb<for.body.preheader>:
349349
; CHECK-NEXT: IR %0 = zext i32 %n to i64
350-
; CHECK-NEXT: EMIT vp<%2> = EXPAND SCEV (zext i32 %n to i64)
350+
; CHECK-NEXT: EMIT vp<[[TC]]> = EXPAND SCEV (zext i32 %n to i64)
351351
; CHECK-NEXT: No successors
352352
; CHECK-EMPTY:
353353
; CHECK-NEXT: vector.ph:
354354
; CHECK-NEXT: Successor(s): vector loop
355355
; CHECK-EMPTY:
356356
; CHECK-NEXT: <x1> vector loop: {
357357
; CHECK-NEXT: vector.body:
358-
; CHECK-NEXT: EMIT vp<%3> = CANONICAL-INDUCTION ir<0>, vp<%8>
359-
; CHECK-NEXT: vp<%4> = DERIVED-IV ir<%n> + vp<%3> * ir<-1>
360-
; CHECK-NEXT: vp<%5> = SCALAR-STEPS vp<%4>, ir<-1>
361-
; CHECK-NEXT: CLONE ir<%i.0> = add nsw vp<%5>, ir<-1>
358+
; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
359+
; CHECK-NEXT: vp<[[DEV_IV:%.+]]> = DERIVED-IV ir<%n> + vp<[[CAN_IV]]> * ir<-1>
360+
; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[DEV_IV]]>, ir<-1>
361+
; CHECK-NEXT: CLONE ir<%i.0> = add nsw vp<[[STEPS]]>, ir<-1>
362362
; CHECK-NEXT: CLONE ir<%idxprom> = zext ir<%i.0>
363363
; CHECK-NEXT: CLONE ir<%arrayidx> = getelementptr inbounds ir<%B>, ir<%idxprom>
364-
; CHECK-NEXT: vp<%6> = vector-pointer (reverse) ir<%arrayidx>
365-
; CHECK-NEXT: WIDEN ir<%13> = load vp<%6>
364+
; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer (reverse) ir<%arrayidx>
365+
; CHECK-NEXT: WIDEN ir<%13> = load vp<[[VEC_PTR]]>
366366
; CHECK-NEXT: WIDEN ir<%conv1> = fadd ir<%13>, ir<1.000000e+00>
367367
; CHECK-NEXT: CLONE ir<%arrayidx3> = getelementptr inbounds ir<%A>, ir<%idxprom>
368-
; CHECK-NEXT: vp<%7> = vector-pointer (reverse) ir<%arrayidx3>
369-
; CHECK-NEXT: WIDEN store vp<%7>, ir<%conv1>
370-
; CHECK-NEXT: EMIT vp<%8> = add nuw vp<%3>, vp<%0>
371-
; CHECK-NEXT: EMIT branch-on-count vp<%8>, vp<%1>
368+
; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer (reverse) ir<%arrayidx3>
369+
; CHECK-NEXT: WIDEN store vp<[[VEC_PTR]]>, ir<%conv1>
370+
; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
371+
; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VEC_TC]]>
372372
; CHECK-NEXT: No successors
373373
; CHECK-NEXT: }
374374
; CHECK-NEXT: Successor(s): middle.block
375375
; CHECK-EMPTY:
376376
; CHECK-NEXT: middle.block:
377-
; CHECK-NEXT: EMIT vp<%10> = icmp eq vp<%2>, vp<%1>
378-
; CHECK-NEXT: EMIT branch-on-cond vp<%10>
377+
; CHECK-NEXT: EMIT vp<[[CMP:%.+]]> = icmp eq vp<[[TC]]>, vp<[[VEC_TC]]>
378+
; CHECK-NEXT: EMIT branch-on-cond vp<[[CMP]]>
379379
; CHECK-NEXT: Successor(s): ir-bb<for.cond.cleanup.loopexit>, scalar.ph
380380
; CHECK-EMPTY:
381381
; CHECK-NEXT: ir-bb<for.cond.cleanup.loopexit>:

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