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[RISCV] Don't check hasStdExtZfh and hasStdExtZfhmin. NFC
hasStdExtZfh implies hasStdExtZfhmin so it is sufficient to check only hasStdExtZfhmin. Similar for Zhinx and Zhinxmin.
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llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -19106,8 +19106,7 @@ bool RISCV::CC_RISCV_FastCC(const DataLayout &DL, RISCVABI::ABI ABI,
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const RISCVSubtarget &Subtarget = TLI.getSubtarget();
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19109-
if (LocVT == MVT::f16 &&
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(Subtarget.hasStdExtZfh() || Subtarget.hasStdExtZfhmin())) {
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if (LocVT == MVT::f16 && Subtarget.hasStdExtZfhmin()) {
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static const MCPhysReg FPR16List[] = {
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RISCV::F10_H, RISCV::F11_H, RISCV::F12_H, RISCV::F13_H, RISCV::F14_H,
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RISCV::F15_H, RISCV::F16_H, RISCV::F17_H, RISCV::F0_H, RISCV::F1_H,
@@ -19144,8 +19143,7 @@ bool RISCV::CC_RISCV_FastCC(const DataLayout &DL, RISCVABI::ABI ABI,
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}
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// Check if there is an available GPR before hitting the stack.
19147-
if ((LocVT == MVT::f16 &&
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(Subtarget.hasStdExtZhinx() || Subtarget.hasStdExtZhinxmin())) ||
19146+
if ((LocVT == MVT::f16 && Subtarget.hasStdExtZhinxmin()) ||
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(LocVT == MVT::f32 && Subtarget.hasStdExtZfinx()) ||
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(LocVT == MVT::f64 && Subtarget.is64Bit() &&
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Subtarget.hasStdExtZdinx())) {

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