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[RISCV][GISEL] Add IRTranslation for shufflevector on scalable vector types
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3 files changed

+1550
-12
lines changed

3 files changed

+1550
-12
lines changed

llvm/lib/CodeGen/MachineVerifier.cpp

Lines changed: 23 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1618,20 +1618,34 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) {
16181618

16191619
// Don't check that all operands are vector because scalars are used in
16201620
// place of 1 element vectors.
1621-
int SrcNumElts = Src0Ty.isVector() ? Src0Ty.getNumElements() : 1;
1622-
int DstNumElts = DstTy.isVector() ? DstTy.getNumElements() : 1;
1621+
ElementCount SrcNumElts = Src0Ty.isVector() ? Src0Ty.getElementCount()
1622+
: ElementCount::getFixed(1);
1623+
ElementCount DstNumElts =
1624+
DstTy.isVector() ? DstTy.getElementCount() : ElementCount::getFixed(1);
16231625

16241626
ArrayRef<int> MaskIdxes = MaskOp.getShuffleMask();
16251627

1626-
if (static_cast<int>(MaskIdxes.size()) != DstNumElts)
1628+
// For scalable vectors, there is an entry in the Mask for each
1629+
// KnownMinValue.
1630+
if (MaskIdxes.size() != DstNumElts.getKnownMinValue())
16271631
report("Wrong result type for shufflemask", MI);
16281632

1629-
for (int Idx : MaskIdxes) {
1630-
if (Idx < 0)
1631-
continue;
1632-
1633-
if (Idx >= 2 * SrcNumElts)
1634-
report("Out of bounds shuffle index", MI);
1633+
if (Src0Ty.isScalableVector()) {
1634+
if (!llvm::all_of(MaskIdxes,
1635+
[&MaskIdxes](int M) { return M == MaskIdxes[0]; }))
1636+
report("Elements of a scalable G_SHUFFLE_VECTOR mask must match", MI);
1637+
if (MaskIdxes[0] != 0 && MaskIdxes[0] != -1)
1638+
report("Elements of a scalable G_SHUFFLE_VECTOR mask be zero or undef",
1639+
MI);
1640+
} else {
1641+
// Idxes for fixed vectors must be in bounds or undef, which is
1642+
// represented as -1.
1643+
for (int Idx : MaskIdxes) {
1644+
if (Idx < 0)
1645+
continue;
1646+
if ((unsigned)Idx >= 2 * SrcNumElts.getFixedValue())
1647+
report("Out of bounds shuffle index", MI);
1648+
}
16351649
}
16361650

16371651
break;

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -20485,11 +20485,11 @@ unsigned RISCVTargetLowering::getCustomCtpopCost(EVT VT,
2048520485

2048620486
bool RISCVTargetLowering::fallBackToDAGISel(const Instruction &Inst) const {
2048720487

20488-
// GISel support is in progress or complete for G_ADD, G_SUB, G_AND, G_OR, and
20489-
// G_XOR.
20488+
// GISel support is in progress or complete for these opcodes.
2049020489
unsigned Op = Inst.getOpcode();
2049120490
if (Op == Instruction::Add || Op == Instruction::Sub ||
20492-
Op == Instruction::And || Op == Instruction::Or || Op == Instruction::Xor)
20491+
Op == Instruction::And || Op == Instruction::Or ||
20492+
Op == Instruction::Xor || Op == Instruction::ShuffleVector)
2049320493
return false;
2049420494

2049520495
if (Inst.getType()->isScalableTy())

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