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Address review comments
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-6
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4 files changed

+22
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llvm/docs/GlobalISel/GenericOpcode.rst

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@@ -68,6 +68,7 @@ key (32-bit imm), address for address discrimination (zero if not needed) and
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an extra discriminator (64-bit imm).
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.. code-block:: none
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%0:_(p0) = G_PTRAUTH_GLOBAL_VALUE %1:_(p0), s32, %2:_(p0), s64
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G_BLOCK_ADDR

llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

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@@ -886,6 +886,13 @@ class MachineIRBuilder {
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MachineInstrBuilder buildFConstant(const DstOp &Res, double Val);
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MachineInstrBuilder buildFConstant(const DstOp &Res, const APFloat &Val);
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/// Build and insert G_PTRAUTH_GLOBAL_VALUE
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///
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/// \return a MachineInstrBuilder for the newly created instruction.
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MachineInstrBuilder buildConstantPtrAuth(const DstOp &Res,
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const ConstantPtrAuth *CPA,
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Register Addr, Register AddrDisc);
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/// Build and insert \p Res = COPY Op
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///
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/// Register-to-register COPY sets \p Res to \p Op.

llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp

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@@ -3497,12 +3497,7 @@ bool IRTranslator::translate(const Constant &C, Register Reg) {
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else if (auto CPA = dyn_cast<ConstantPtrAuth>(&C)) {
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Register Addr = getOrCreateVReg(*CPA->getPointer());
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Register AddrDisc = getOrCreateVReg(*CPA->getAddrDiscriminator());
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EntryBuilder->buildInstr(TargetOpcode::G_PTRAUTH_GLOBAL_VALUE)
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.addDef(Reg)
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.addUse(Addr)
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.addImm(CPA->getKey()->getZExtValue())
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.addUse(AddrDisc)
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.addImm(CPA->getDiscriminator()->getZExtValue());
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EntryBuilder->buildConstantPtrAuth(Reg, CPA, Addr, AddrDisc);
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} else if (auto CAZ = dyn_cast<ConstantAggregateZero>(&C)) {
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if (!isa<FixedVectorType>(CAZ->getType()))
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return false;

llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

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@@ -397,6 +397,19 @@ MachineInstrBuilder MachineIRBuilder::buildFConstant(const DstOp &Res,
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return buildFConstant(Res, *CFP);
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}
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MachineInstrBuilder
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MachineIRBuilder::buildConstantPtrAuth(const DstOp &Res,
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const ConstantPtrAuth *CPA,
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Register Addr, Register AddrDisc) {
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auto MIB = buildInstr(TargetOpcode::G_PTRAUTH_GLOBAL_VALUE);
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Res.addDefToMIB(*getMRI(), MIB);
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MIB.addUse(Addr);
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MIB.addImm(CPA->getKey()->getZExtValue());
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MIB.addUse(AddrDisc);
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MIB.addImm(CPA->getDiscriminator()->getZExtValue());
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return MIB;
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}
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MachineInstrBuilder MachineIRBuilder::buildBrCond(const SrcOp &Tst,
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MachineBasicBlock &Dest) {
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assert(Tst.getLLTTy(*getMRI()).isScalar() && "invalid operand type");

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