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s-perrons-perron
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[HLSL][SPIRV] Use Spirv target codegen (#112573)
When the arch in the triple in "spirv", the default target codegen is currently used. We should be using the spir-v target codegen. This will be used to have SPIR-V specific lowering of the HLSL types.
1 parent 8046f15 commit 2c8ecb3

6 files changed

+19
-18
lines changed

‎clang/lib/CodeGen/CodeGenModule.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -295,6 +295,7 @@ createTargetCodeGenInfo(CodeGenModule &CGM) {
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return createCommonSPIRTargetCodeGenInfo(CGM);
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case llvm::Triple::spirv32:
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case llvm::Triple::spirv64:
298+
case llvm::Triple::spirv:
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return createSPIRVTargetCodeGenInfo(CGM);
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case llvm::Triple::dxil:
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return createDirectXTargetCodeGenInfo(CGM);

‎clang/test/CodeGenHLSL/builtins/WaveReadLaneAt.hlsl

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -10,65 +10,65 @@
1010
// CHECK-LABEL: test_int
1111
int test_int(int expr, uint idx) {
1212
// CHECK-SPIRV: %[[#entry_tok0:]] = call token @llvm.experimental.convergence.entry()
13-
// CHECK-SPIRV: %[[RET:.*]] = call [[TY:.*]] @llvm.spv.wave.readlane.i32([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok0]]) ]
13+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.i32([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok0]]) ]
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// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.i32([[TY]] %[[#]], i32 %[[#]])
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// CHECK: ret [[TY]] %[[RET]]
1616
return WaveReadLaneAt(expr, idx);
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}
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// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.i32([[TY]], i32) #[[#attr:]]
20-
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.i32([[TY]], i32) #[[#attr:]]
20+
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.readlane.i32([[TY]], i32) #[[#attr:]]
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#ifdef __HLSL_ENABLE_16_BIT
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// CHECK-LABEL: test_int16
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int16_t test_int16(int16_t expr, uint idx) {
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// CHECK-SPIRV: %[[#entry_tok1:]] = call token @llvm.experimental.convergence.entry()
26-
// CHECK-SPIRV: %[[RET:.*]] = call [[TY:.*]] @llvm.spv.wave.readlane.i16([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok1]]) ]
26+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.i16([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok1]]) ]
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// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.i16([[TY]] %[[#]], i32 %[[#]])
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// CHECK: ret [[TY]] %[[RET]]
2929
return WaveReadLaneAt(expr, idx);
3030
}
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3232
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.i16([[TY]], i32) #[[#attr:]]
33-
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.i16([[TY]], i32) #[[#attr:]]
33+
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.readlane.i16([[TY]], i32) #[[#attr:]]
3434
#endif
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3636
// Test basic lowering to runtime function call with array and float values.
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// CHECK-LABEL: test_half
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half test_half(half expr, uint idx) {
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// CHECK-SPIRV: %[[#entry_tok2:]] = call token @llvm.experimental.convergence.entry()
41-
// CHECK-SPIRV: %[[RET:.*]] = call [[TY:.*]] @llvm.spv.wave.readlane.f16([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok2]]) ]
41+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.f16([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok2]]) ]
4242
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.f16([[TY]] %[[#]], i32 %[[#]])
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// CHECK: ret [[TY]] %[[RET]]
4444
return WaveReadLaneAt(expr, idx);
4545
}
4646

4747
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.f16([[TY]], i32) #[[#attr:]]
48-
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.f16([[TY]], i32) #[[#attr:]]
48+
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.readlane.f16([[TY]], i32) #[[#attr:]]
4949

5050
// CHECK-LABEL: test_double
5151
double test_double(double expr, uint idx) {
5252
// CHECK-SPIRV: %[[#entry_tok3:]] = call token @llvm.experimental.convergence.entry()
53-
// CHECK-SPIRV: %[[RET:.*]] = call [[TY:.*]] @llvm.spv.wave.readlane.f64([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok3]]) ]
53+
// CHECK-SPIRV: %[[RET:.*]] = call spir_func [[TY:.*]] @llvm.spv.wave.readlane.f64([[TY]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok3]]) ]
5454
// CHECK-DXIL: %[[RET:.*]] = call [[TY:.*]] @llvm.dx.wave.readlane.f64([[TY]] %[[#]], i32 %[[#]])
5555
// CHECK: ret [[TY]] %[[RET]]
5656
return WaveReadLaneAt(expr, idx);
5757
}
5858

5959
// CHECK-DXIL: declare [[TY]] @llvm.dx.wave.readlane.f64([[TY]], i32) #[[#attr:]]
60-
// CHECK-SPIRV: declare [[TY]] @llvm.spv.wave.readlane.f64([[TY]], i32) #[[#attr:]]
60+
// CHECK-SPIRV: declare spir_func [[TY]] @llvm.spv.wave.readlane.f64([[TY]], i32) #[[#attr:]]
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6262
// CHECK-LABEL: test_floatv4
6363
float4 test_floatv4(float4 expr, uint idx) {
6464
// CHECK-SPIRV: %[[#entry_tok4:]] = call token @llvm.experimental.convergence.entry()
65-
// CHECK-SPIRV: %[[RET1:.*]] = call [[TY1:.*]] @llvm.spv.wave.readlane.v4f32([[TY1]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok4]]) ]
65+
// CHECK-SPIRV: %[[RET1:.*]] = call spir_func [[TY1:.*]] @llvm.spv.wave.readlane.v4f32([[TY1]] %[[#]], i32 %[[#]]) [ "convergencectrl"(token %[[#entry_tok4]]) ]
6666
// CHECK-DXIL: %[[RET1:.*]] = call [[TY1:.*]] @llvm.dx.wave.readlane.v4f32([[TY1]] %[[#]], i32 %[[#]])
6767
// CHECK: ret [[TY1]] %[[RET1]]
6868
return WaveReadLaneAt(expr, idx);
6969
}
7070

7171
// CHECK-DXIL: declare [[TY1]] @llvm.dx.wave.readlane.v4f32([[TY1]], i32) #[[#attr]]
72-
// CHECK-SPIRV: declare [[TY1]] @llvm.spv.wave.readlane.v4f32([[TY1]], i32) #[[#attr]]
72+
// CHECK-SPIRV: declare spir_func [[TY1]] @llvm.spv.wave.readlane.v4f32([[TY1]], i32) #[[#attr]]
7373

7474
// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}

‎clang/test/CodeGenHLSL/builtins/wave_get_lane_index_do_while.hlsl

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -17,7 +17,7 @@ void main() {
1717
// CHECK: br i1 {{%.+}}, label %[[LABEL_IF_THEN:.+]], label %[[LABEL_IF_END:.+]]
1818

1919
// CHECK: [[LABEL_IF_THEN]]:
20-
// CHECK: call i32 @__hlsl_wave_get_lane_index() [ "convergencectrl"(token %[[CT_LOOP]]) ]
20+
// CHECK: call spir_func i32 @__hlsl_wave_get_lane_index() [ "convergencectrl"(token %[[CT_LOOP]]) ]
2121
// CHECK: br label %[[LABEL_WHILE_END:.+]]
2222
if (cond == 2) {
2323
uint index = WaveGetLaneIndex();
@@ -33,7 +33,7 @@ void main() {
3333
// CHECK: ret void
3434
}
3535

36-
// CHECK-DAG: declare i32 @__hlsl_wave_get_lane_index() [[A1:#[0-9]+]]
36+
// CHECK-DAG: declare spir_func i32 @__hlsl_wave_get_lane_index() [[A1:#[0-9]+]]
3737

3838
// CHECK-DAG: attributes [[A0]] = {{{.*}}convergent{{.*}}}
3939
// CHECK-DAG: attributes [[A1]] = {{{.*}}convergent{{.*}}}

‎clang/test/CodeGenHLSL/builtins/wave_get_lane_index_simple.hlsl

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,13 +9,13 @@
99
// CHECK-SPIRV: define spir_func noundef i32 @{{.*test_1.*}}() [[A0:#[0-9]+]] {
1010
// CHECK-DXIL: define noundef i32 @{{.*test_1.*}}() [[A0:#[0-9]+]] {
1111
// CHECK-SPIRV: %[[CI:[0-9]+]] = call token @llvm.experimental.convergence.entry()
12-
// CHECK-SPIRV: call i32 @__hlsl_wave_get_lane_index() [ "convergencectrl"(token %[[CI]]) ]
12+
// CHECK-SPIRV: call spir_func i32 @__hlsl_wave_get_lane_index() [ "convergencectrl"(token %[[CI]]) ]
1313
// CHECK-DXIL: call i32 @llvm.dx.wave.getlaneindex()
1414
int test_1() {
1515
return WaveGetLaneIndex();
1616
}
1717

18-
// CHECK-SPIRV: declare i32 @__hlsl_wave_get_lane_index() [[A1:#[0-9]+]]
18+
// CHECK-SPIRV: declare spir_func i32 @__hlsl_wave_get_lane_index() [[A1:#[0-9]+]]
1919
// CHECK-DXIL: declare i32 @llvm.dx.wave.getlaneindex() [[A1:#[0-9]+]]
2020

2121
// CHECK-DAG: attributes [[A0]] = { {{.*}}convergent{{.*}} }

‎clang/test/CodeGenHLSL/builtins/wave_get_lane_index_subcall.hlsl

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,12 +3,12 @@
33

44
// CHECK: define spir_func noundef i32 @_Z6test_1v() [[A0:#[0-9]+]] {
55
// CHECK: %[[C1:[0-9]+]] = call token @llvm.experimental.convergence.entry()
6-
// CHECK: call i32 @__hlsl_wave_get_lane_index() [ "convergencectrl"(token %[[C1]]) ]
6+
// CHECK: call spir_func i32 @__hlsl_wave_get_lane_index() [ "convergencectrl"(token %[[C1]]) ]
77
uint test_1() {
88
return WaveGetLaneIndex();
99
}
1010

11-
// CHECK-DAG: declare i32 @__hlsl_wave_get_lane_index() [[A1:#[0-9]+]]
11+
// CHECK-DAG: declare spir_func i32 @__hlsl_wave_get_lane_index() [[A1:#[0-9]+]]
1212

1313
// CHECK: define spir_func noundef i32 @_Z6test_2v() [[A0]] {
1414
// CHECK: %[[C2:[0-9]+]] = call token @llvm.experimental.convergence.entry()

‎clang/test/CodeGenHLSL/builtins/wave_is_first_lane.hlsl

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,15 +13,15 @@ void main() {
1313
while (true) {
1414

1515
// CHECK-DXIL: %[[#]] = call i1 @llvm.dx.wave.is.first.lane()
16-
// CHECK-SPIRV: %[[#]] = call i1 @llvm.spv.wave.is.first.lane()
16+
// CHECK-SPIRV: %[[#]] = call spir_func i1 @llvm.spv.wave.is.first.lane()
1717
// CHECK-SPIRV-SAME: [ "convergencectrl"(token %[[#loop_tok]]) ]
1818
if (WaveIsFirstLane()) {
1919
break;
2020
}
2121
}
2222

2323
// CHECK-DXIL: %[[#]] = call i1 @llvm.dx.wave.is.first.lane()
24-
// CHECK-SPIRV: %[[#]] = call i1 @llvm.spv.wave.is.first.lane()
24+
// CHECK-SPIRV: %[[#]] = call spir_func i1 @llvm.spv.wave.is.first.lane()
2525
// CHECK-SPIRV-SAME: [ "convergencectrl"(token %[[#entry_tok]]) ]
2626
if (WaveIsFirstLane()) {
2727
return;

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