Run clang-format

Author: adprasad-nvidia

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -22217,19 +22217,17 @@ static SDValue performExtendCombine(SDNode *N,
   // any_extend. This means that we can replace this pattern with (rev16
   // (any_extend ...)). This saves a machine instruction compared to (lsr (rev
   // ...)), which is what this pattern would otherwise be lowered to.
-  // Only apply this optimisation if any_extend in original pattern to i32 or i64,
-  // because this type will become the input type to REV16 in the new pattern, so
-  // must be a legitimate REV16 input type. 
+  // Only apply this optimisation if any_extend in original pattern to i32 or
+  // i64, because this type will become the input type to REV16 in the new
+  // pattern, so must be a legitimate REV16 input type.
   if (N->getOpcode() == ISD::ANY_EXTEND &&
       N->getOperand(0).getOpcode() == ISD::BSWAP &&
       N->getOperand(0).getValueType() == MVT::i16 &&
-      (N->getValueType(0) == MVT::i32 ||
-       N->getValueType(0) == MVT::i64)) {
+      (N->getValueType(0) == MVT::i32 || N->getValueType(0) == MVT::i64)) {
     SDNode *BswapNode = N->getOperand(0).getNode();
     SDLoc DL(N);
-    SDValue NewAnyExtend =
-        DAG.getNode(ISD::ANY_EXTEND, DL, N->getValueType(0),
-                    BswapNode->getOperand(0));
+    SDValue NewAnyExtend = DAG.getNode(ISD::ANY_EXTEND, DL, N->getValueType(0),
+                                       BswapNode->getOperand(0));
     return DAG.getNode(AArch64ISD::REV16, SDLoc(N), N->getValueType(0),
                        NewAnyExtend);
   }