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jsjis-barannikov
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[TableGen] Fix validateOperandClass for non Phyical Reg (#118146)
b71704436e61 Rewrote the register operands handling, but the Table only contains physical regs, we will SEGV when there are non physical regs. --------- Co-authored-by: Sergei Barannikov <[email protected]>
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llvm/utils/TableGen/AsmMatcherEmitter.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2522,8 +2522,9 @@ static void emitValidateOperandClass(const CodeGenTarget &Target,
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for (auto &MatchClassName : Table)
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OS << " " << MatchClassName << ",\n";
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OS << " };\n\n";
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OS << " MatchClassKind OpKind = "
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"(MatchClassKind)Table[Operand.getReg().id()];\n";
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OS << " unsigned RegID = Operand.getReg().id();\n";
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OS << " MatchClassKind OpKind = MCRegister::isPhysicalRegister(RegID) ? "
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"(MatchClassKind)Table[RegID] : InvalidMatchClass;\n";
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OS << " return isSubclass(OpKind, Kind) ? "
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<< "(unsigned)MCTargetAsmParser::Match_Success :\n "
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<< " getDiagKindFromRegisterClass(Kind);\n }\n\n";

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