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Pierre-vh · Pierre-vh · commit 363504877890 · 2025-03-17T09:13:15.000Z
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
@@ -2433,8 +2433,6 @@ void AMDGPURegisterBankInfo::applyMappingImpl(
       return;
     }
 
-    // 16-bit operations are VALU only, but can be promoted to 32-bit SALU.
-    // Packed 16-bit operations need to be scalarized and promoted.
     if (DstTy.getSizeInBits() == 16 && DstBank == &AMDGPU::SGPRRegBank) {
       const LLT S32 = LLT::scalar(32);
       MachineBasicBlock *MBB = MI.getParent();

Original file line number	Diff line number	Diff line change
`@@ -2433,8 +2433,6 @@ void AMDGPURegisterBankInfo::applyMappingImpl(`
`2433`	`2433`	`return;`
`2434`	`2434`	`}`
`2435`	`2435`
`2436`		`- // 16-bit operations are VALU only, but can be promoted to 32-bit SALU.`
`2437`		`- // Packed 16-bit operations need to be scalarized and promoted.`
`2438`	`2436`	`if (DstTy.getSizeInBits() == 16 && DstBank == &AMDGPU::SGPRRegBank) {`
`2439`	`2437`	`const LLT S32 = LLT::scalar(32);`
`2440`	`2438`	`MachineBasicBlock *MBB = MI.getParent();`